source: rtems/c/src/lib/libbsp/m68k/mcf5235/startup/init5235.c @ 1612af0

4.104.114.84.95
Last change on this file since 1612af0 was 1612af0, checked in by Joel Sherrill <joel.sherrill@…>, on 06/17/05 at 14:06:05

2005-06-17 Mike Bertosh <mbertosh@…>

  • .cvsignore, ChangeLog?, Makefile.am, README, bsp_specs, configure.ac, clock/clock.c, console/console.c, include/bsp.h, include/coverhd.h, include/tm27.h, network/network.c, start/start.S, startup/bspclean.c, startup/bspstart.c, startup/init5235.c, startup/linkcmds, startup/linkcmdsflash, startup/linkcmdsram, timer/timer.c: New files.
  • Property mode set to 100644
File size: 2.1 KB
Line 
1/*
2 *  This is where the real hardware setup is done. A minimal stack
3 *  has been provided by the start.S code. No normal C or RTEMS
4 *  functions can be called from here.
5 *
6 * This routine is pretty simple for the uC5235 because all the hard
7 * work has been done by the bootstrap dBUG code.
8 */
9
10#include <rtems.h>
11#include <bsp.h>
12#define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr" : : "d" (_cacr))
13#define m68k_set_acr0(_acr0) asm volatile ("movec %0,%%acr0" : : "d" (_acr0))
14#define m68k_set_acr1(_acr1) asm volatile ("movec %0,%%acr1" : : "d" (_acr1))
15#define MM_SDRAM_BASE           (0x00000000)
16
17void Init5235 (void)
18{
19    extern void CopyDataClearBSSAndStart (void);
20    int x;
21    int temp = 0;
22   
23    //Setup the GPIO Registers
24    MCF5235_GPIO_UART=0x3FFF;
25    MCF5235_GPIO_PAR_AD=0xE1;
26   
27    //Setup the Chip Selects so CS0 is flash
28    MCF5235_CS_CSAR0 =(0xFFE00000 & 0xffff0000)>>16;
29    MCF5235_CS_CSMR0 = 0x001f0001;
30    MCF5235_CS_CSCR0 = 0x1980;
31   
32    //Setup the SDRAM
33    for(x=0; x<20000; x++)
34    {
35        temp +=1;
36    }
37    MCF5235_SDRAMC_DCR  = 0x042E;
38    MCF5235_SDRAMC_DACR0 = 0x00001300;
39    MCF5235_SDRAMC_DMR0 = (0x00FC0000) | (0x00000001);
40    for(x=0; x<20000; x++)
41    {
42        temp +=1;
43    }
44    // set ip ( bit 3 ) in dacr
45    MCF5235_SDRAMC_DACR0 |= (0x00000008) ;
46    // init precharge
47    *((unsigned long *)MM_SDRAM_BASE) = 0xDEADBEEF;
48    // set RE in dacr
49    MCF5235_SDRAMC_DACR0 |= (0x00008000); 
50    // wait
51    for(x=0; x<20000; x++)
52    {
53        temp +=1;
54    }
55    // issue IMRS
56    MCF5235_SDRAMC_DACR0 |= (0x00000040);
57    *((short *)MM_SDRAM_BASE) = 0;
58    for(x=0; x<60000; x++)
59    {
60        temp +=1;
61    }
62    *((unsigned long*)MM_SDRAM_BASE)=0x12345678;
63       
64    /* Copy the interrupt vector table to address 0x0 in SDRAM */
65    {
66        extern void INTERRUPT_VECTOR();
67        uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR;
68        uint32_t *intvec = (uint32_t *)0x0;
69        register int i;
70        for (i = 0; i < 256; i++)
71        {
72            *(intvec++) = *(inttab++);
73        }
74    }
75
76     /*
77     * Copy data, clear BSS and call boot_card()
78     */
79    CopyDataClearBSSAndStart ();
80}
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