[1612af0] | 1 | /* |
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| 2 | * This is where the real hardware setup is done. A minimal stack |
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| 3 | * has been provided by the start.S code. No normal C or RTEMS |
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| 4 | * functions can be called from here. |
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| 5 | * |
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| 6 | * This routine is pretty simple for the uC5235 because all the hard |
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| 7 | * work has been done by the bootstrap dBUG code. |
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| 8 | */ |
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| 9 | |
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| 10 | #include <rtems.h> |
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| 11 | #include <bsp.h> |
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| 12 | #define m68k_set_cacr(_cacr) asm volatile ("movec %0,%%cacr" : : "d" (_cacr)) |
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| 13 | #define m68k_set_acr0(_acr0) asm volatile ("movec %0,%%acr0" : : "d" (_acr0)) |
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| 14 | #define m68k_set_acr1(_acr1) asm volatile ("movec %0,%%acr1" : : "d" (_acr1)) |
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| 15 | #define MM_SDRAM_BASE (0x00000000) |
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| 16 | |
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[504c5ca] | 17 | /* |
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| 18 | * MCF5235_BSP_START_FROM_FLASH comes from the linker script |
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| 19 | * If it is set to 0 then it is assumed that the motorola debug monitor |
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| 20 | * is present and we do not need to re-initialize the SDRAM. Otherwise, |
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| 21 | * if it is set to 1 then we want to boot our own code from flash and we |
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| 22 | * do need to initialize the SDRAM. |
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| 23 | */ |
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| 24 | |
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| 25 | |
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| 26 | extern uint32_t MCF5235_BSP_START_FROM_FLASH; |
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| 27 | |
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[1612af0] | 28 | void Init5235 (void) |
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| 29 | { |
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| 30 | extern void CopyDataClearBSSAndStart (void); |
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| 31 | int x; |
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| 32 | int temp = 0; |
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[504c5ca] | 33 | int *address_of_MCF5235_BSP_START_FROM_FLASH; |
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[1612af0] | 34 | |
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[1883c87] | 35 | /*Setup the GPIO Registers */ |
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[1612af0] | 36 | MCF5235_GPIO_UART=0x3FFF; |
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| 37 | MCF5235_GPIO_PAR_AD=0xE1; |
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| 38 | |
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[1883c87] | 39 | /*Setup the Chip Selects so CS0 is flash */ |
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[1612af0] | 40 | MCF5235_CS_CSAR0 =(0xFFE00000 & 0xffff0000)>>16; |
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| 41 | MCF5235_CS_CSMR0 = 0x001f0001; |
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| 42 | MCF5235_CS_CSCR0 = 0x1980; |
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| 43 | |
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[504c5ca] | 44 | address_of_MCF5235_BSP_START_FROM_FLASH = (int *) & MCF5235_BSP_START_FROM_FLASH; |
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| 45 | if ( (int)address_of_MCF5235_BSP_START_FROM_FLASH == 1) { |
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[1883c87] | 46 | /*Setup the SDRAM */ |
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[504c5ca] | 47 | for(x=0; x<20000; x++) |
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| 48 | { |
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| 49 | temp +=1; |
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| 50 | } |
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| 51 | MCF5235_SDRAMC_DCR = 0x042E; |
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| 52 | MCF5235_SDRAMC_DACR0 = 0x00001300; |
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| 53 | MCF5235_SDRAMC_DMR0 = (0x00FC0000) | (0x00000001); |
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| 54 | for(x=0; x<20000; x++) |
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| 55 | { |
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| 56 | temp +=1; |
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| 57 | } |
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[1883c87] | 58 | /* set ip ( bit 3 ) in dacr */ |
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[504c5ca] | 59 | MCF5235_SDRAMC_DACR0 |= (0x00000008) ; |
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[1883c87] | 60 | /* init precharge */ |
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[504c5ca] | 61 | *((unsigned long *)MM_SDRAM_BASE) = 0xDEADBEEF; |
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[1883c87] | 62 | /* set RE in dacr */ |
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[504c5ca] | 63 | MCF5235_SDRAMC_DACR0 |= (0x00008000); |
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[1883c87] | 64 | /* wait */ |
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[504c5ca] | 65 | for(x=0; x<20000; x++) |
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| 66 | { |
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| 67 | temp +=1; |
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| 68 | } |
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[1883c87] | 69 | /* issue IMRS */ |
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[504c5ca] | 70 | MCF5235_SDRAMC_DACR0 |= (0x00000040); |
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| 71 | *((short *)MM_SDRAM_BASE) = 0; |
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| 72 | for(x=0; x<60000; x++) |
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| 73 | { |
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| 74 | temp +=1; |
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| 75 | } |
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| 76 | *((unsigned long*)MM_SDRAM_BASE)=0x12345678; |
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| 77 | } /* we have finished setting up the sdram */ |
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[1612af0] | 78 | |
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| 79 | /* Copy the interrupt vector table to address 0x0 in SDRAM */ |
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| 80 | { |
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[a840853] | 81 | extern void INTERRUPT_VECTOR(void); |
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[1612af0] | 82 | uint32_t *inttab = (uint32_t *)&INTERRUPT_VECTOR; |
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| 83 | uint32_t *intvec = (uint32_t *)0x0; |
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| 84 | register int i; |
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| 85 | for (i = 0; i < 256; i++) |
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| 86 | { |
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| 87 | *(intvec++) = *(inttab++); |
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| 88 | } |
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| 89 | } |
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| 90 | |
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[504c5ca] | 91 | m68k_set_vbr(0); |
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| 92 | |
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| 93 | /* |
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[1612af0] | 94 | * Copy data, clear BSS and call boot_card() |
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| 95 | */ |
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| 96 | CopyDataClearBSSAndStart (); |
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| 97 | } |
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