source: rtems/c/src/lib/libbsp/m68k/mcf5235/clock/clock.c @ f3b29236

Last change on this file since f3b29236 was f3b29236, checked in by Sebastian Huber <sebastian.huber@…>, on Sep 18, 2017 at 6:22:38 AM

bsps: Clock_driver_support_install_isr()

Remove old ISR parameter since is not used by the clock driver shell.
Make an implementation optional.

Update #3139.

  • Property mode set to 100644
File size: 2.1 KB
Line 
1/*
2 * Use the last periodic interval timer (PIT3) as the system clock.
3 */
4
5#include <rtems.h>
6#include <bsp.h>
7#include <mcf5235/mcf5235.h>
8
9/*
10 * Use INTC0 base
11 */
12#define CLOCK_VECTOR (64+39)
13
14/*
15 * Periodic interval timer interrupt handler
16 */
17#define Clock_driver_support_at_tick()             \
18    do {                                           \
19        MCF5235_PIT_PCSR3 |= MCF5235_PIT_PCSR_PIF; \
20    } while (0)                                    \
21
22/*
23 * Attach clock interrupt handler
24 */
25#define Clock_driver_support_install_isr( _new ) \
26    set_vector(_new, CLOCK_VECTOR, 1)
27
28/*
29 * Turn off the clock
30 */
31#define Clock_driver_support_shutdown_hardware()   \
32    do {                                           \
33        MCF5235_PIT_PCSR3 &= ~MCF5235_PIT_PCSR_EN; \
34    } while(0)
35
36/*
37 * Set up the clock hardware
38 *
39 * We need to have 1 interrupt every 10,000 microseconds
40 * so we need to set prescaler to 64 and the PMR register to 0x2DC6
41 */
42#define Clock_driver_support_initialize_hardware()                       \
43    do {                                                                 \
44        int level;                                                       \
45        int preScaleCode = 6;                                            \
46        MCF5235_INTC0_ICR39 = MCF5235_INTC_ICR_IL(PIT3_IRQ_LEVEL) |      \
47                              MCF5235_INTC_ICR_IP(PIT3_IRQ_PRIORITY);    \
48        rtems_interrupt_disable( level );                                \
49        MCF5235_INTC0_IMRH &= ~MCF5235_INTC0_IMRH_INT39;                  \
50        MCF5235_PIT_PCSR3 &= ~MCF5235_PIT_PCSR_EN;               \
51        rtems_interrupt_enable( level );                                 \
52                MCF5235_PIT_PMR3 = 0x2DC6;                               \
53                MCF5235_PIT_PCSR3 = MCF5235_PIT_PCSR_PRE(preScaleCode) | \
54                            MCF5235_PIT_PCSR_PIE |                       \
55                            MCF5235_PIT_PCSR_RLD |                       \
56                            MCF5235_PIT_PCSR_EN;                         \
57    } while (0)
58
59#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
60
61#include "../../../shared/clockdrv_shell.h"
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