4.115
Last change
on this file since af03345 was
af03345,
checked in by Joel Sherrill <joel.sherrill@…>, on 10/13/14 at 21:54:12
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Move CPU cache support from mcf5225x BSP to libcpu
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-
Property mode set to
100644
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File size:
983 bytes
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1 | /* |
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2 | * This routine does the bulk of the system initialisation. |
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3 | */ |
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4 | |
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5 | /* |
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6 | * Author: |
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7 | * David Fiddes, D.J@fiddes.surfaid.org |
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8 | * http://www.calm.hw.ac.uk/davidf/coldfire/ |
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9 | * |
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10 | * COPYRIGHT (c) 1989-1998. |
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11 | * On-Line Applications Research Corporation (OAR). |
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12 | * |
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13 | * The license and distribution terms for this file may be |
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14 | * found in the file LICENSE in this distribution or at |
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15 | * http://www.rtems.org/license/LICENSE. |
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16 | */ |
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17 | |
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18 | #include <bsp.h> |
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19 | #include <bsp/bootcard.h> |
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20 | |
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21 | void __attribute__((weak)) bsp_start(void) |
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22 | { |
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23 | } |
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24 | |
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25 | uint32_t __attribute__((weak)) bsp_get_CPU_clock_speed(void) |
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26 | { |
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27 | #define DEF_CLOCK_SPEED 8000000.0F //8.0 MHz |
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28 | #define MCF_MFD0_2_MASK 0x7000U |
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29 | #define MCF_RFD0_2_MASK 0x0700U |
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30 | #define MCF_MFD0_2_OFFSET 4U |
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31 | |
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32 | #define SPEED_BIAS ((((MCF_CLOCK_SYNCR & MCF_MFD0_2_MASK) >> 11) + MCF_MFD0_2_OFFSET) / (float)(((MCF_CLOCK_SYNCR & MCF_RFD0_2_MASK)>>7) ? : 1.0F)) |
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33 | |
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34 | return MCF_CLOCK_SYNCR & MCF_CLOCK_SYNCR_PLLEN ? SPEED_BIAS * DEF_CLOCK_SPEED : DEF_CLOCK_SPEED; |
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35 | } |
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