source: rtems/c/src/lib/libbsp/m68k/mcf5225x/clock/clock.c @ ef04443

5
Last change on this file since ef04443 was 30be024a, checked in by Sebastian Huber <sebastian.huber@…>, on 08/03/17 at 12:48:04

Optional Clock_driver_support_shutdown_hardware()

Make Clock_driver_support_shutdown_hardware() optional. This avoids
the atexit() support on memory constrained targets.

  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 * Use the last periodic interval timer (PIT2) as the system clock.
3 */
4
5#include <rtems.h>
6#include <rtems/timecounter.h>
7#include <bsp.h>
8
9/*
10 * Use INTC0 base
11 */
12#define CLOCK_VECTOR (64+56)
13
14static rtems_timecounter_simple mcf5225x_tc;
15
16static uint32_t mcf5225x_tc_get(rtems_timecounter_simple *tc)
17{
18  return MCF_PIT1_PCNTR;
19}
20
21static bool mcf5225x_tc_is_pending(rtems_timecounter_simple *tc)
22{
23  return (MCF_PIT1_PCSR & MCF_PIT_PCSR_PIF) != 0;
24}
25
26static uint32_t mcf5225x_tc_get_timecount(struct timecounter *tc)
27{
28  return rtems_timecounter_simple_downcounter_get(
29    tc,
30    mcf5225x_tc_get,
31    mcf5225x_tc_is_pending
32  );
33}
34
35static void mcf5225x_tc_at_tick(rtems_timecounter_simple *tc)
36{
37  MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF;
38}
39
40static void mcf5225x_tc_tick(void)
41{
42  rtems_timecounter_simple_downcounter_tick(
43    &mcf5225x_tc,
44    mcf5225x_tc_get,
45    mcf5225x_tc_at_tick
46  );
47}
48
49/*
50 * Attach clock interrupt handler
51 */
52#define Clock_driver_support_install_isr( _new, _old )             \
53    do {                                                           \
54        _old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \
55    } while(0)
56
57/*
58 * Turn off the clock
59 */
60#define Clock_driver_support_shutdown_hardware() \
61  do { \
62    MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; \
63  } while (0)
64
65/*
66 * Set up the clock hardware
67 *
68 * We need to have 1 interrupt every BSP_rtems_configuration_get_microseconds_per_tick()
69 */
70static void Clock_driver_support_initialize_hardware(void)
71{
72  int level;
73  uint32_t pmr;
74  uint32_t preScaleCode = 0;
75  uint32_t clk = bsp_get_CPU_clock_speed() >> 1;
76  uint32_t tps = 1000000 / rtems_configuration_get_microseconds_per_tick();
77
78  while (preScaleCode < 15) {
79    pmr = (clk >> preScaleCode) / tps;
80    if (pmr < (1 << 15))
81      break;
82    preScaleCode++;
83  }
84
85  MCF_INTC0_ICR56 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL) |
86    MCF_INTC_ICR_IP(PIT3_IRQ_PRIORITY);
87  rtems_interrupt_disable(level);
88  MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_MASK56;
89  MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN;
90  rtems_interrupt_enable(level);
91
92  MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
93    MCF_PIT_PCSR_OVW | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD;
94  MCF_PIT1_PMR = pmr;
95  MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
96    MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN;
97
98  rtems_timecounter_simple_install(
99    &mcf5225x_tc,
100    clk >> preScaleCode,
101    pmr,
102    mcf5225x_tc_get_timecount
103  );
104}
105
106#define Clock_driver_timecounter_tick() mcf5225x_tc_tick()
107
108#include "../../../shared/clockdrv_shell.h"
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