1 | /* |
---|
2 | * Use the last periodic interval timer (PIT2) as the system clock. |
---|
3 | * |
---|
4 | * $Id$ |
---|
5 | */ |
---|
6 | |
---|
7 | #include <rtems.h> |
---|
8 | #include <bsp.h> |
---|
9 | |
---|
10 | /* |
---|
11 | * Use INTC0 base |
---|
12 | */ |
---|
13 | #define CLOCK_VECTOR (64+56) |
---|
14 | |
---|
15 | static uint32_t s_pcntrAtTick = 0; |
---|
16 | static uint32_t s_nanoScale = 0; |
---|
17 | |
---|
18 | /* |
---|
19 | * Provide nanosecond extension |
---|
20 | */ |
---|
21 | static uint32_t bsp_clock_nanoseconds_since_last_tick(void) |
---|
22 | { |
---|
23 | uint32_t i = MCF_PIT1_PCNTR; |
---|
24 | if(MCF_PIT1_PCSR & MCF_PIT_PCSR_PIF) |
---|
25 | { |
---|
26 | i = MCF_PIT1_PCNTR + MCF_PIT1_PMR; |
---|
27 | } |
---|
28 | return (i - s_pcntrAtTick) * s_nanoScale; |
---|
29 | } |
---|
30 | |
---|
31 | #define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick |
---|
32 | |
---|
33 | /* |
---|
34 | * Periodic interval timer interrupt handler |
---|
35 | */ |
---|
36 | #define Clock_driver_support_at_tick() \ |
---|
37 | do { \ |
---|
38 | s_pcntrAtTick = MCF_PIT1_PCNTR; \ |
---|
39 | MCF_PIT1_PCSR |= MCF_PIT_PCSR_PIF; \ |
---|
40 | } while (0) \ |
---|
41 | |
---|
42 | /* |
---|
43 | * Attach clock interrupt handler |
---|
44 | */ |
---|
45 | #define Clock_driver_support_install_isr( _new, _old ) \ |
---|
46 | do { \ |
---|
47 | _old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \ |
---|
48 | } while(0) |
---|
49 | |
---|
50 | /* |
---|
51 | * Turn off the clock |
---|
52 | */ |
---|
53 | static void Clock_driver_support_shutdown_hardware() |
---|
54 | { |
---|
55 | MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; |
---|
56 | } |
---|
57 | |
---|
58 | /* |
---|
59 | * Set up the clock hardware |
---|
60 | * |
---|
61 | * We need to have 1 interrupt every BSP_Configuration.microseconds_per_tick |
---|
62 | */ |
---|
63 | static void Clock_driver_support_initialize_hardware() |
---|
64 | { |
---|
65 | int level; |
---|
66 | uint32_t pmr; |
---|
67 | uint32_t preScaleCode = 0; |
---|
68 | uint32_t clk = bsp_get_CPU_clock_speed() >> 1; |
---|
69 | uint32_t tps = 1000000 / Configuration.microseconds_per_tick; |
---|
70 | while (preScaleCode < 15) { |
---|
71 | pmr = (clk >> preScaleCode) / tps; |
---|
72 | if(pmr < (1 << 15)) break; |
---|
73 | preScaleCode++; |
---|
74 | } |
---|
75 | s_nanoScale = 1000000000 / (clk >> preScaleCode); |
---|
76 | |
---|
77 | MCF_INTC0_ICR56 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL) | |
---|
78 | MCF_INTC_ICR_IP(PIT3_IRQ_PRIORITY); |
---|
79 | rtems_interrupt_disable( level ); |
---|
80 | MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_MASK56; |
---|
81 | MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; |
---|
82 | rtems_interrupt_enable( level ); |
---|
83 | |
---|
84 | MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) | |
---|
85 | MCF_PIT_PCSR_OVW | |
---|
86 | MCF_PIT_PCSR_PIE | |
---|
87 | MCF_PIT_PCSR_RLD; |
---|
88 | MCF_PIT1_PMR = pmr; |
---|
89 | MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) | |
---|
90 | MCF_PIT_PCSR_PIE | |
---|
91 | MCF_PIT_PCSR_RLD | |
---|
92 | MCF_PIT_PCSR_EN; |
---|
93 | s_pcntrAtTick = MCF_PIT1_PCNTR; |
---|
94 | } |
---|
95 | |
---|
96 | #include "../../../shared/clockdrv_shell.c" |
---|