source: rtems/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h @ cba8970e

5
Last change on this file since cba8970e was cba8970e, checked in by Joel Sherrill <joel@…>, on Nov 10, 2017 at 8:23:05 PM

mcf5206elite/include/bsp.h: Rename delay() to rtems_bsp_delay() to avoid conflicts

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File size: 4.6 KB
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1/*
2 * Board Support Package for MCF5206eLITE evaluation board
3 * BSP definitions
4 *
5 * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
6 * Author: Victor V. Vengerov <vvv@oktet.ru>
7 *
8 * The license and distribution terms for this file may be
9 * found in the file LICENSE in this distribution or at
10 *
11 * http://www.rtems.org/license/LICENSE.
12 */
13
14#ifndef LIBBSP_M68K_MCF5206ELITE_BSP_H
15#define LIBBSP_M68K_MCF5206ELITE_BSP_H
16
17#include "mcf5206/mcf5206e.h"
18
19/*** Board resources allocation ***/
20
21/*
22 * To achieve some compatibility with dBUG monitor, we use the same
23 * memory resources allocation as it is used in dBUG.
24 *
25 * If this definitions will be changed, change the linker script also.
26 */
27
28/* Memory mapping */
29/* CS0: Boot Flash */
30#define BSP_MEM_ADDR_FLASH    (0xFFE00000)
31#define BSP_MEM_SIZE_FLASH    (1*1024*1024)
32#define BSP_MEM_MASK_FLASH    (MCF5206E_CSMR_MASK_1M)
33
34/* CS2: External SRAM */
35#define BSP_MEM_ADDR_ESRAM    (0x30000000)
36#define BSP_MEM_SIZE_ESRAM    (1*1024*1024)
37#define BSP_MEM_MASK_ESRAM    (MCF5206E_CSMR_MASK_1M)
38
39/* CS3: General-Purpose I/O register */
40#define BSP_MEM_ADDR_GPIO     (0x40000000)
41#define BSP_MEM_SIZE_GPIO     (64*1024)
42#define BSP_MEM_MASK_GPIO     (MCF5206E_CSMR_MASK_64K)
43
44/* DRAM0: Dynamic RAM */
45#define BSP_MEM_ADDR_DRAM     (0x00000000)
46#define BSP_MEM_SIZE_DRAM     (16*1024*1024)
47#define BSP_MEM_MASK_DRAM     (MCF5206E_DCMR_MASK_16M)
48
49/* On-chip SRAM */
50#define BSP_MEM_ADDR_SRAM     (0x20000000)
51#define BSP_MEM_SIZE_SRAM     (8*1024)
52
53/* On-chip peripherial registers */
54#define BSP_MEM_ADDR_IMM      (0x10000000)
55#define BSP_MEM_SIZE_IMM      (1*1024)
56#define MBAR BSP_MEM_ADDR_IMM
57
58/* Interrupt vector assignment */
59#define BSP_INTVEC_AVEC1    (25)
60#define BSP_INTLVL_AVEC1    (1)
61#define BSP_INTPRIO_AVEC1   (3)
62
63#define BSP_INTVEC_AVEC2    (26)
64#define BSP_INTLVL_AVEC2    (2)
65#define BSP_INTPRIO_AVEC2   (3)
66
67#define BSP_INTVEC_AVEC3    (27)
68#define BSP_INTLVL_AVEC3    (3)
69#define BSP_INTPRIO_AVEC3   (3)
70
71#define BSP_INTVEC_AVEC4    (28)
72#define BSP_INTLVL_AVEC4    (4)
73#define BSP_INTPRIO_AVEC4   (3)
74
75#define BSP_INTVEC_AVEC5    (29)
76#define BSP_INTLVL_AVEC5    (5)
77#define BSP_INTPRIO_AVEC5   (3)
78
79#define BSP_INTVEC_AVEC6    (30)
80#define BSP_INTLVL_AVEC6    (6)
81#define BSP_INTPRIO_AVEC6   (3)
82
83#define BSP_INTVEC_AVEC7    (31)
84#define BSP_INTLVL_AVEC7    (7)
85#define BSP_INTPRIO_AVEC7   (3)
86
87#define BSP_INTVEC_TIMER1   (BSP_INTVEC_AVEC5)
88#define BSP_INTLVL_TIMER1   (BSP_INTLVL_AVEC5)
89#define BSP_INTPRIO_TIMER1  (2)
90
91#define BSP_INTVEC_TIMER2    (BSP_INTVEC_AVEC6)
92#define BSP_INTLVL_TIMER2    (BSP_INTLVL_AVEC6)
93#define BSP_INTPRIO_TIMER2   (2)
94
95#define BSP_INTVEC_MBUS     (BSP_INTVEC_AVEC4)
96#define BSP_INTLVL_MBUS     (BSP_INTLVL_AVEC4)
97#define BSP_INTPRIO_MBUS    (2)
98
99#define BSP_INTVEC_UART1    (64)
100#define BSP_INTLVL_UART1    (4)
101#define BSP_INTPRIO_UART1   (0)
102
103#define BSP_INTVEC_UART2    (65)
104#define BSP_INTLVL_UART2    (4)
105#define BSP_INTPRIO_UART2   (1)
106
107#define BSP_INTVEC_DMA0     (66)
108#define BSP_INTLVL_DMA0     (3)
109#define BSP_INTPRIO_DMA0    (1)
110
111#define BSP_INTVEC_DMA1     (67)
112#define BSP_INTLVL_DMA1     (3)
113#define BSP_INTPRIO_DMA1    (2)
114
115/* Location of DS1307 Real-Time Clock/NVRAM chip */
116#define DS1307_I2C_BUS_NUMBER (0)
117
118#ifndef ASM
119
120#include <bspopts.h>
121#include <rtems.h>
122#include <bsp/default-initial-extension.h>
123
124#ifdef __cplusplus
125extern "C" {
126#endif
127
128/* System frequency */
129#define BSP_SYSTEM_FREQUENCY ((unsigned int)&_SYS_CLOCK_FREQUENCY)
130extern char _SYS_CLOCK_FREQUENCY; /* Don't use this variable directly!!! */
131
132/* MBUS I2C bus clock default frequency */
133#define BSP_MBUS_FREQUENCY (16000)
134
135/* Number of I2C buses supported in this board */
136#define I2C_NUMBER_OF_BUSES (1)
137
138/* I2C bus selection */
139#define I2C_SELECT_BUS(bus)
140
141/*
142 *  Simple spin delay in microsecond units for device drivers.
143 *  This is very dependent on the clock speed of the target.
144 */
145
146#define rtems_bsp_delay( microseconds ) \
147  { register uint32_t         _delay=(microseconds); \
148    register uint32_t         _tmp=123; \
149    __asm__ volatile( "0: \
150                     nbcd      %0 ; \
151                     nbcd      %0 ; \
152                     dbf       %1,0b" \
153                  : "=d" (_tmp), "=d" (_delay) \
154                  : "0"  (_tmp), "1"  (_delay) ); \
155  }
156
157
158extern rtems_isr_entry M68Kvec[];   /* vector table address */
159
160extern rtems_isr (*rtems_clock_hook)(rtems_vector_number);
161
162/* functions */
163
164rtems_isr_entry set_vector(
165  rtems_isr_entry     handler,
166  rtems_vector_number vector,
167  int                 type
168);
169
170/*
171 * Prototypes for BSP methods that cross file boundaries
172 */
173void Init5206e(void);
174
175#ifdef __cplusplus
176}
177#endif
178
179#endif /* ASM */
180
181#endif
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