source: rtems/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h @ b7044dc

4.104.114.84.95
Last change on this file since b7044dc was b7044dc, checked in by Ralf Corsepius <ralf.corsepius@…>, on Mar 31, 2004 at 4:40:43 AM

2004-03-31 Ralf Corsepius <ralf_corsepius@…>

  • console/console.c, i2c/i2c.c, i2c/i2cdrv.c, include/bsp.h, include/i2c.h, nvram/nvram.c, startup/bspstart.c, startup/init5206e.c, tod/ds1307.c: Convert to using c99 fixed size types.
  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*
2 * Board Support Package for MCF5206eLITE evaluation board
3 * BSP definitions
4 *
5 * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
6 * Author: Victor V. Vengerov <vvv@oktet.ru>
7 *
8 * The license and distribution terms for this file may be
9 * found in the file LICENSE in this distribution or at
10 *
11 * http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15
16#ifndef __mcf5206elite_BSP_h
17#define __mcf5206elite_BSP_h
18
19#include "mcf5206/mcf5206e.h"
20
21#ifndef KB
22#define KB (1024)
23#endif
24#ifndef MB
25#define MB (KB*KB)
26#endif
27
28/*** Board resources allocation ***/
29
30
31/*
32 * To achieve some compatibility with dBUG monitor, we use the same
33 * memory resources allocation as it is used in dBUG.
34 *
35 * If this definitions will be changed, change the linker script also.
36 */
37 
38/* Memory mapping */
39/* CS0: Boot Flash */
40#define BSP_MEM_ADDR_FLASH    (0xFFE00000)
41#define BSP_MEM_SIZE_FLASH    (1*MB)
42#define BSP_MEM_MASK_FLASH    (MCF5206E_CSMR_MASK_1M)
43
44/* CS2: External SRAM */
45#define BSP_MEM_ADDR_ESRAM    (0x30000000)
46#define BSP_MEM_SIZE_ESRAM    (1*MB)
47#define BSP_MEM_MASK_ESRAM    (MCF5206E_CSMR_MASK_1M)
48
49/* CS3: General-Purpose I/O register */
50#define BSP_MEM_ADDR_GPIO     (0x40000000)
51#define BSP_MEM_SIZE_GPIO     (64*KB)
52#define BSP_MEM_MASK_GPIO     (MCF5206E_CSMR_MASK_64K)
53
54/* DRAM0: Dynamic RAM */
55#define BSP_MEM_ADDR_DRAM     (0x00000000)
56#define BSP_MEM_SIZE_DRAM     (16*MB)
57#define BSP_MEM_MASK_DRAM     (MCF5206E_DCMR_MASK_16M)
58
59/* On-chip SRAM */
60#define BSP_MEM_ADDR_SRAM     (0x20000000)
61#define BSP_MEM_SIZE_SRAM     (8*KB)
62
63/* On-chip peripherial registers */
64#define BSP_MEM_ADDR_IMM      (0x10000000)
65#define BSP_MEM_SIZE_IMM      (1*KB)
66#define MBAR BSP_MEM_ADDR_IMM
67
68/* Interrupt vector assignment */
69#define BSP_INTVEC_AVEC1    (25)
70#define BSP_INTLVL_AVEC1    (1)
71#define BSP_INTPRIO_AVEC1   (3)
72
73#define BSP_INTVEC_AVEC2    (26)
74#define BSP_INTLVL_AVEC2    (2)
75#define BSP_INTPRIO_AVEC2   (3)
76
77#define BSP_INTVEC_AVEC3    (27)
78#define BSP_INTLVL_AVEC3    (3)
79#define BSP_INTPRIO_AVEC3   (3)
80
81#define BSP_INTVEC_AVEC4    (28)
82#define BSP_INTLVL_AVEC4    (4)
83#define BSP_INTPRIO_AVEC4   (3)
84
85#define BSP_INTVEC_AVEC5    (29)
86#define BSP_INTLVL_AVEC5    (5)
87#define BSP_INTPRIO_AVEC5   (3)
88
89#define BSP_INTVEC_AVEC6    (30)
90#define BSP_INTLVL_AVEC6    (6)
91#define BSP_INTPRIO_AVEC6   (3)
92
93#define BSP_INTVEC_AVEC7    (31)
94#define BSP_INTLVL_AVEC7    (7)
95#define BSP_INTPRIO_AVEC7   (3)
96
97#define BSP_INTVEC_TIMER1   (BSP_INTVEC_AVEC5)
98#define BSP_INTLVL_TIMER1   (BSP_INTLVL_AVEC5)
99#define BSP_INTPRIO_TIMER1  (2)
100
101#define BSP_INTVEC_TIMER2    (BSP_INTVEC_AVEC6)
102#define BSP_INTLVL_TIMER2    (BSP_INTLVL_AVEC6)
103#define BSP_INTPRIO_TIMER2   (2)
104
105#define BSP_INTVEC_MBUS     (BSP_INTVEC_AVEC4)
106#define BSP_INTLVL_MBUS     (BSP_INTLVL_AVEC4)
107#define BSP_INTPRIO_MBUS    (2)
108
109#define BSP_INTVEC_UART1    (64)
110#define BSP_INTLVL_UART1    (4)
111#define BSP_INTPRIO_UART1   (0)
112
113#define BSP_INTVEC_UART2    (65)
114#define BSP_INTLVL_UART2    (4)
115#define BSP_INTPRIO_UART2   (1)
116
117#define BSP_INTVEC_DMA0     (66)
118#define BSP_INTLVL_DMA0     (3)
119#define BSP_INTPRIO_DMA0    (1)
120
121#define BSP_INTVEC_DMA1     (67)
122#define BSP_INTLVL_DMA1     (3)
123#define BSP_INTPRIO_DMA1    (2)
124
125/* Location of DS1307 Real-Time Clock/NVRAM chip */
126#define DS1307_I2C_BUS_NUMBER (0)
127
128#ifndef ASM
129
130#ifdef __cplusplus
131extern "C" {
132#endif
133
134#include <bspopts.h>
135#include <rtems.h>
136#include <console.h>
137#include <iosupp.h>
138#include <clockdrv.h>
139
140#include "i2c.h"
141
142/*
143 *  confdefs.h overrides for this BSP:
144 *   - termios serial ports (defaults to 1)
145 *   - Interrupt stack space is not minimum if defined.
146 */
147
148#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
149#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
150
151/* System frequency */
152#define BSP_SYSTEM_FREQUENCY ((unsigned int)&_SYS_CLOCK_FREQUENCY)
153extern char _SYS_CLOCK_FREQUENCY; /* Don't use this variable directly!!! */
154
155/* MBUS I2C bus clock default frequency */
156#define BSP_MBUS_FREQUENCY (16000)
157
158/* Number of I2C buses supported in this board */
159#define I2C_NUMBER_OF_BUSES (1)
160
161/* I2C bus selection */
162#define I2C_SELECT_BUS(bus)
163
164/*
165 *  Define the time limits for RTEMS Test Suite test durations.
166 *  Long test and short test duration limits are provided.  These
167 *  values are in seconds and need to be converted to ticks for the
168 *  application.
169 *
170 */
171
172#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
173#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
174
175/*
176 *  Stuff for Time Test 27
177 *  Don't bother with hardware -- just use a software-interrupt
178 */
179
180#define MUST_WAIT_FOR_INTERRUPT 0
181
182#define Install_tm27_vector( handler ) set_vector( (handler), 34, 1 )
183
184#define Cause_tm27_intr()       asm volatile ("trap #2");
185
186#define Clear_tm27_intr()
187
188#define Lower_tm27_intr()
189
190/*
191 *  Simple spin delay in microsecond units for device drivers.
192 *  This is very dependent on the clock speed of the target.
193 */
194
195#define delay( microseconds ) \
196  { register uint32_t         _delay=(microseconds); \
197    register uint32_t         _tmp=123; \
198    asm volatile( "0: \
199                     nbcd      %0 ; \
200                     nbcd      %0 ; \
201                     dbf       %1,0b" \
202                  : "=d" (_tmp), "=d" (_delay) \
203                  : "0"  (_tmp), "1"  (_delay) ); \
204  }
205
206/* Constants */
207
208/* Structures */
209
210/*
211 *  Device Driver Table Entries
212 */
213
214/*
215 * NOTE: Use the standard Console driver entry
216 */
217 
218/*
219 * NOTE: Use the standard Clock driver entry
220 */
221
222/*
223 * Real-Time Clock Driver Table Entry
224 * NOTE: put this entry to the device driver table AFTER I2C bus driver!
225 */
226#define RTC_DRIVER_TABLE_ENTRY \
227    { rtc_initialize, NULL, NULL, NULL, NULL, NULL }
228extern rtems_device_driver rtc_initialize(
229    rtems_device_major_number major,
230    rtems_device_minor_number minor,
231    void *arg
232);
233
234/* miscellaneous stuff assumed to exist */
235
236extern rtems_configuration_table BSP_Configuration;
237
238extern m68k_isr_entry M68Kvec[];   /* vector table address */
239
240extern rtems_isr (*rtems_clock_hook)(rtems_vector_number);
241
242/* functions */
243
244void bsp_cleanup( void );
245
246m68k_isr_entry set_vector(
247  rtems_isr_entry     handler,
248  rtems_vector_number vector,
249  int                 type
250);
251
252/*
253 * Values assigned by link editor
254 */
255extern void *_RomBase, *_RamBase;
256
257#ifdef __cplusplus
258}
259#endif
260
261#endif /* ASM */
262
263#endif
264/* end of include file */
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