source: rtems/c/src/lib/libbsp/m68k/mcf5206elite/include/bsp.h @ 0df29b07

4.104.114.84.95
Last change on this file since 0df29b07 was 0df29b07, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 22, 2004 at 3:41:35 PM

2004-04-22 Ralf Corsepius <ralf_corsepius@…>

  • include/bsp.h: Split out tmtest27 support.
  • include/tm27.h: New.
  • Property mode set to 100644
File size: 5.5 KB
Line 
1/*
2 * Board Support Package for MCF5206eLITE evaluation board
3 * BSP definitions
4 *
5 * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
6 * Author: Victor V. Vengerov <vvv@oktet.ru>
7 *
8 * The license and distribution terms for this file may be
9 * found in the file LICENSE in this distribution or at
10 *
11 * http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15
16#ifndef __mcf5206elite_BSP_h
17#define __mcf5206elite_BSP_h
18
19#include "mcf5206/mcf5206e.h"
20
21#ifndef KB
22#define KB (1024)
23#endif
24#ifndef MB
25#define MB (KB*KB)
26#endif
27
28/*** Board resources allocation ***/
29
30/*
31 * To achieve some compatibility with dBUG monitor, we use the same
32 * memory resources allocation as it is used in dBUG.
33 *
34 * If this definitions will be changed, change the linker script also.
35 */
36
37/* Memory mapping */
38/* CS0: Boot Flash */
39#define BSP_MEM_ADDR_FLASH    (0xFFE00000)
40#define BSP_MEM_SIZE_FLASH    (1*MB)
41#define BSP_MEM_MASK_FLASH    (MCF5206E_CSMR_MASK_1M)
42
43/* CS2: External SRAM */
44#define BSP_MEM_ADDR_ESRAM    (0x30000000)
45#define BSP_MEM_SIZE_ESRAM    (1*MB)
46#define BSP_MEM_MASK_ESRAM    (MCF5206E_CSMR_MASK_1M)
47
48/* CS3: General-Purpose I/O register */
49#define BSP_MEM_ADDR_GPIO     (0x40000000)
50#define BSP_MEM_SIZE_GPIO     (64*KB)
51#define BSP_MEM_MASK_GPIO     (MCF5206E_CSMR_MASK_64K)
52
53/* DRAM0: Dynamic RAM */
54#define BSP_MEM_ADDR_DRAM     (0x00000000)
55#define BSP_MEM_SIZE_DRAM     (16*MB)
56#define BSP_MEM_MASK_DRAM     (MCF5206E_DCMR_MASK_16M)
57
58/* On-chip SRAM */
59#define BSP_MEM_ADDR_SRAM     (0x20000000)
60#define BSP_MEM_SIZE_SRAM     (8*KB)
61
62/* On-chip peripherial registers */
63#define BSP_MEM_ADDR_IMM      (0x10000000)
64#define BSP_MEM_SIZE_IMM      (1*KB)
65#define MBAR BSP_MEM_ADDR_IMM
66
67/* Interrupt vector assignment */
68#define BSP_INTVEC_AVEC1    (25)
69#define BSP_INTLVL_AVEC1    (1)
70#define BSP_INTPRIO_AVEC1   (3)
71
72#define BSP_INTVEC_AVEC2    (26)
73#define BSP_INTLVL_AVEC2    (2)
74#define BSP_INTPRIO_AVEC2   (3)
75
76#define BSP_INTVEC_AVEC3    (27)
77#define BSP_INTLVL_AVEC3    (3)
78#define BSP_INTPRIO_AVEC3   (3)
79
80#define BSP_INTVEC_AVEC4    (28)
81#define BSP_INTLVL_AVEC4    (4)
82#define BSP_INTPRIO_AVEC4   (3)
83
84#define BSP_INTVEC_AVEC5    (29)
85#define BSP_INTLVL_AVEC5    (5)
86#define BSP_INTPRIO_AVEC5   (3)
87
88#define BSP_INTVEC_AVEC6    (30)
89#define BSP_INTLVL_AVEC6    (6)
90#define BSP_INTPRIO_AVEC6   (3)
91
92#define BSP_INTVEC_AVEC7    (31)
93#define BSP_INTLVL_AVEC7    (7)
94#define BSP_INTPRIO_AVEC7   (3)
95
96#define BSP_INTVEC_TIMER1   (BSP_INTVEC_AVEC5)
97#define BSP_INTLVL_TIMER1   (BSP_INTLVL_AVEC5)
98#define BSP_INTPRIO_TIMER1  (2)
99
100#define BSP_INTVEC_TIMER2    (BSP_INTVEC_AVEC6)
101#define BSP_INTLVL_TIMER2    (BSP_INTLVL_AVEC6)
102#define BSP_INTPRIO_TIMER2   (2)
103
104#define BSP_INTVEC_MBUS     (BSP_INTVEC_AVEC4)
105#define BSP_INTLVL_MBUS     (BSP_INTLVL_AVEC4)
106#define BSP_INTPRIO_MBUS    (2)
107
108#define BSP_INTVEC_UART1    (64)
109#define BSP_INTLVL_UART1    (4)
110#define BSP_INTPRIO_UART1   (0)
111
112#define BSP_INTVEC_UART2    (65)
113#define BSP_INTLVL_UART2    (4)
114#define BSP_INTPRIO_UART2   (1)
115
116#define BSP_INTVEC_DMA0     (66)
117#define BSP_INTLVL_DMA0     (3)
118#define BSP_INTPRIO_DMA0    (1)
119
120#define BSP_INTVEC_DMA1     (67)
121#define BSP_INTLVL_DMA1     (3)
122#define BSP_INTPRIO_DMA1    (2)
123
124/* Location of DS1307 Real-Time Clock/NVRAM chip */
125#define DS1307_I2C_BUS_NUMBER (0)
126
127#ifndef ASM
128
129#ifdef __cplusplus
130extern "C" {
131#endif
132
133#include <bspopts.h>
134#include <rtems.h>
135#include <rtems/console.h>
136#include <rtems/iosupp.h>
137#include <rtems/clockdrv.h>
138
139#include "i2c.h"
140
141/*
142 *  confdefs.h overrides for this BSP:
143 *   - termios serial ports (defaults to 1)
144 *   - Interrupt stack space is not minimum if defined.
145 */
146
147#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
148#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
149
150/* System frequency */
151#define BSP_SYSTEM_FREQUENCY ((unsigned int)&_SYS_CLOCK_FREQUENCY)
152extern char _SYS_CLOCK_FREQUENCY; /* Don't use this variable directly!!! */
153
154/* MBUS I2C bus clock default frequency */
155#define BSP_MBUS_FREQUENCY (16000)
156
157/* Number of I2C buses supported in this board */
158#define I2C_NUMBER_OF_BUSES (1)
159
160/* I2C bus selection */
161#define I2C_SELECT_BUS(bus)
162
163/*
164 *  Simple spin delay in microsecond units for device drivers.
165 *  This is very dependent on the clock speed of the target.
166 */
167
168#define delay( microseconds ) \
169  { register uint32_t         _delay=(microseconds); \
170    register uint32_t         _tmp=123; \
171    asm volatile( "0: \
172                     nbcd      %0 ; \
173                     nbcd      %0 ; \
174                     dbf       %1,0b" \
175                  : "=d" (_tmp), "=d" (_delay) \
176                  : "0"  (_tmp), "1"  (_delay) ); \
177  }
178
179/* Constants */
180
181/* Structures */
182
183/*
184 *  Device Driver Table Entries
185 */
186
187/*
188 * NOTE: Use the standard Console driver entry
189 */
190
191/*
192 * NOTE: Use the standard Clock driver entry
193 */
194
195/*
196 * Real-Time Clock Driver Table Entry
197 * NOTE: put this entry to the device driver table AFTER I2C bus driver!
198 */
199#define RTC_DRIVER_TABLE_ENTRY \
200    { rtc_initialize, NULL, NULL, NULL, NULL, NULL }
201extern rtems_device_driver rtc_initialize(
202    rtems_device_major_number major,
203    rtems_device_minor_number minor,
204    void *arg
205);
206
207/* miscellaneous stuff assumed to exist */
208
209extern rtems_configuration_table BSP_Configuration;
210
211extern m68k_isr_entry M68Kvec[];   /* vector table address */
212
213extern rtems_isr (*rtems_clock_hook)(rtems_vector_number);
214
215/* functions */
216
217void bsp_cleanup( void );
218
219m68k_isr_entry set_vector(
220  rtems_isr_entry     handler,
221  rtems_vector_number vector,
222  int                 type
223);
224
225/*
226 * Values assigned by link editor
227 */
228extern void *_RomBase, *_RamBase;
229
230#ifdef __cplusplus
231}
232#endif
233
234#endif /* ASM */
235
236#endif
237/* end of include file */
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