1 | # |
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2 | # README for MCF5206eLITE Board Support Package |
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3 | # |
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4 | # Copyright (C) 2000,2001 OKTET Ltd., St.-Petersburg, Russia |
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5 | # Author: Victor V. Vengerov <vvv@oktet.ru> |
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6 | # |
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7 | # The license and distribution terms for this file may be |
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8 | # found in the file LICENSE in this distribution or at |
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9 | # |
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10 | # http://www.OARcorp.com/rtems/license.html. |
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11 | # |
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12 | # @(#) $Id$ |
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13 | # |
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14 | |
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15 | # |
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16 | # This board support package works with MCF5206eLITE evaluation board with |
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17 | # Motorola Coldfire MCF5206e CPU. |
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18 | # |
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19 | # Many thanks to Balanced Audio Technology (http://www.balanced.com), |
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20 | # company which donates MCF5206eLITE evaluation board, P&E Coldfire BDM |
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21 | # interface and provides support for development of this BSP and generic |
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22 | # MCF5206 CPU code. |
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23 | # |
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24 | # Decisions made at compile time include: |
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25 | # |
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26 | # Decisions to be made a link-edit time are: |
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27 | # - The size of memory allocator heap. By default, all available |
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28 | # memory allocated for the heap. To specify amount of memory |
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29 | # available for heap: |
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30 | # LDFLAGS += -Wl,--defsym -Wl,HeapSize=xxx |
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31 | # |
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32 | # - The frequency of system clock oscillator. By default, this frequency |
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33 | # is 54MHz. To select other clock frequency for your application, put |
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34 | # line like this in application Makefile: |
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35 | # LDFLAGS += -qclock=40000000 |
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36 | # |
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37 | # - Select between RAM or ROM images. By default, RAM image generated |
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38 | # which may be loaded starting from address 0x30000000 to the RAM. |
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39 | # To prepare image intended to be stored in ROM, put the following |
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40 | # line to the application Makefile: |
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41 | # LDFLAGS += -qflash |
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42 | # |
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43 | # You may select other memory configuration providing your own |
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44 | # linker script. |
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45 | # |
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46 | |
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47 | BSP NAME: mcf5206elite |
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48 | BOARD: MCF5206eLITE Evaluation Board |
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49 | BUS: none |
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50 | CPU FAMILY: Motorola ColdFire |
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51 | COPROCESSORS: none |
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52 | MODE: not applicable |
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53 | DEBUG MONITOR: none (Hardware provides BDM) |
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54 | |
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55 | PERIPHERALS |
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56 | =========== |
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57 | TIMERS: PIT, Watchdog(disabled) |
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58 | RESOLUTION: one microsecond |
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59 | SERIAL PORTS: 2 UART |
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60 | REAL-TIME CLOCK: DS1307 |
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61 | NVRAM: DS1307 |
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62 | DMA: 2 general purpose |
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63 | VIDEO: none |
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64 | SCSI: none |
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65 | NETWORKING: none |
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66 | I2C BUS: MCF5206e MBUS module |
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67 | |
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68 | DRIVER INFORMATION |
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69 | ================== |
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70 | CLOCK DRIVER: Programmable Interval Timer |
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71 | IOSUPP DRIVER: UART 1 |
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72 | SHMSUPP: none |
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73 | TIMER DRIVER: yes |
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74 | I2C DRIVER: yes |
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75 | |
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76 | STDIO |
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77 | ===== |
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78 | PORT: UART 1 |
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79 | ELECTRICAL: EIA-232 |
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80 | BAUD: 19200 |
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81 | BITS PER CHARACTER: 8 |
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82 | PARITY: None |
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83 | STOP BITS: 1 |
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84 | |
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85 | NOTES |
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86 | ===== |
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87 | |
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88 | Board description |
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89 | ----------------- |
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90 | clock rate: 54 MHz default (other oscillator can be installed) |
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91 | bus width: 16-bit PROM, 32-bit external SRAM |
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92 | ROM: Flash memory device AM29LV800BB, 1 MByte, 3 wait states, |
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93 | chip select 0 |
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94 | RAM: Static RAM 2xMCM69F737TQ, 1 MByte, 1 wait state, chip select 2 |
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95 | |
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96 | Host System |
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97 | ----------- |
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98 | RedHat 6.2 (Linux 2.2.14), RedHat 7.0 (Linux 2.2.17) |
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99 | |
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100 | Verification |
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101 | ------------ |
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102 | Single processor tests: passed |
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103 | Multi-processort tests: not applicable |
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104 | Timing tests: passed |
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105 | |
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