[69effbb4] | 1 | /*===============================================================*\ |
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| 2 | | Project: RTEMS generic mcf548x BSP | |
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| 3 | +-----------------------------------------------------------------+ |
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| 4 | | File: clock.c | |
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| 5 | +-----------------------------------------------------------------+ |
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| 6 | | The file contains the clock driver code of generic MCF548x BSP. | |
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| 7 | +-----------------------------------------------------------------+ |
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| 8 | | Copyright (c) 2007 | |
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| 9 | | Embedded Brains GmbH | |
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| 10 | | Obere Lagerstr. 30 | |
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| 11 | | D-82178 Puchheim | |
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| 12 | | Germany | |
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| 13 | | rtems@embedded-brains.de | |
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| 14 | +-----------------------------------------------------------------+ |
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| 15 | | | |
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| 16 | | Parts of the code has been derived from the "dBUG source code" | |
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| 17 | | package Freescale is providing for M548X EVBs. The usage of | |
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| 18 | | the modified or unmodified code and it's integration into the | |
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| 19 | | generic mcf548x BSP has been done according to the Freescale | |
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| 20 | | license terms. | |
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| 21 | | | |
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| 22 | | The Freescale license terms can be reviewed in the file | |
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| 23 | | | |
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| 24 | | Freescale_license.txt | |
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| 25 | | | |
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| 26 | +-----------------------------------------------------------------+ |
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| 27 | | | |
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| 28 | | The generic mcf548x BSP has been developed on the basic | |
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| 29 | | structures and modules of the av5282 BSP. | |
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| 30 | | | |
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| 31 | +-----------------------------------------------------------------+ |
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| 32 | | | |
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| 33 | | The license and distribution terms for this file may be | |
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| 34 | | found in the file LICENSE in this distribution or at | |
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| 35 | | | |
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| 36 | | http://www.rtems.com/license/LICENSE. | |
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| 37 | | | |
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| 38 | +-----------------------------------------------------------------+ |
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| 39 | | | |
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| 40 | | date history ID | |
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| 41 | | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
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| 42 | | 12.11.07 1.0 ras | |
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| 43 | | | |
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| 44 | \*===============================================================*/ |
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| 45 | |
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| 46 | /* |
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| 47 | * Use first slice timer (SLT0) as the system clock. |
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| 48 | * |
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| 49 | */ |
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| 50 | |
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| 51 | #include <rtems.h> |
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| 52 | #include <bsp.h> |
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| 53 | #include <mcf548x/mcf548x.h> |
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| 54 | |
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| 55 | /* |
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| 56 | * Use SLT 0 |
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| 57 | */ |
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| 58 | #define CLOCK_VECTOR (64+54) |
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| 59 | |
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| 60 | /* |
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| 61 | * Periodic interval timer interrupt handler |
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| 62 | */ |
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| 63 | #define Clock_driver_support_at_tick() \ |
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| 64 | do { \ |
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| 65 | MCF548X_SLT_SSR0 = MCF548X_SLT_SSR_ST; \ |
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| 66 | } while (0) \ |
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| 67 | |
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| 68 | /* |
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| 69 | * Attach clock interrupt handler |
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| 70 | */ |
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| 71 | #define Clock_driver_support_install_isr( _new, _old ) \ |
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| 72 | do { \ |
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| 73 | _old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \ |
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| 74 | } while(0) |
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| 75 | |
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| 76 | /* |
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| 77 | * Turn off the clock |
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| 78 | */ |
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| 79 | #define Clock_driver_support_shutdown_hardware() \ |
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| 80 | do { \ |
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| 81 | MCF548X_SLT_SCR0 &= ~(MCF548X_SLT_SCR_TEN | MCF548X_SLT_SCR_RUN | MCF548X_SLT_SCR_IEN); \ |
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| 82 | } while(0) |
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| 83 | |
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| 84 | /* |
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| 85 | * Set up the clock hardware |
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| 86 | * |
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| 87 | * We need to have 1 interrupt every 10,000 microseconds |
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| 88 | * XLB clock 100 MHz / MCF548X_SLT_SLTCNT0 = XLB clock/100 |
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| 89 | */ |
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[045821e] | 90 | #define Clock_driver_support_initialize_hardware() \ |
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| 91 | do { \ |
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| 92 | int level; \ |
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| 93 | MCF548X_INTC_ICR54 = MCF548X_INTC_ICRn_IL(SLT0_IRQ_LEVEL) | \ |
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| 94 | MCF548X_INTC_ICRn_IP(SLT0_IRQ_PRIORITY); \ |
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| 95 | rtems_interrupt_disable( level ); \ |
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| 96 | MCF548X_INTC_IMRH &= ~(MCF548X_INTC_IMRH_INT_MASK54); \ |
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| 97 | rtems_interrupt_enable( level ); \ |
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| 98 | MCF548X_SLT_SLTCNT0 = get_CPU_clock_speed()/100; \ |
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| 99 | MCF548X_SLT_SCR0 |= (MCF548X_SLT_SCR_TEN | MCF548X_SLT_SCR_RUN | MCF548X_SLT_SCR_IEN); \ |
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| 100 | } while (0) |
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[69effbb4] | 101 | |
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[27b355b] | 102 | #include "../../../shared/clockdrv_shell.h" |
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[69effbb4] | 103 | |
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