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start360.s @ f8f370b6

4.104.114.84.95

Last change on this file since f8f370b6 was f8f370b6, checked in by Joel Sherrill <joel.sherrill@…>, on 04/16/97 at 17:45:35
Update from Eric Norum.
Property mode set to `100644`
File size: 10.1 KB

Rev	Line
[f8f370b6]	1	/*
[457b6ae]	2	*
	3	* This file contains the entry point for the application.
	4	* The name of this entry point is compiler dependent.
	5	* It jumps to the BSP which is responsible for performing
	6	* all initialization.
	7	*
	8	* COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
	9	* On-Line Applications Research Corporation (OAR).
	10	* All rights assigned to U.S. Government, 1994.
	11	*
	12	* This material may be reproduced by or for the U.S. Government pursuant
	13	* to the copyright license under the clause at DFARS 252.227-7013. This
	14	* notice must appear in all copies of this file and its derivatives.
	15	*
	16	* Based on the `gen68302' board support package, and covered by the
	17	* original distribution terms.
	18	*
	19	* W. Eric Norum
	20	* Saskatchewan Accelerator Laboratory
	21	* University of Saskatchewan
	22	* Saskatoon, Saskatchewan, CANADA
	23	* eric@skatter.usask.ca
	24	*
	25	* $Id$
	26	*/
	27
	28	#include "asm.h"
	29
	30	BEGIN_CODE
	31	/*
	32	* Step 1: Decide on Reset Stack Pointer and Initial Program Counter
	33	*/
	34	Entry:
	35	.long SYM(m360)+1024 \| 0: Initial SSP
	36	.long start \| 1: Initial PC
	37	.long uhoh \| 2: Bus error
	38	.long uhoh \| 3: Address error
	39	.long uhoh \| 4: Illegal instruction
	40	.long uhoh \| 5: Zero division
	41	.long uhoh \| 6: CHK, CHK2 instruction
	42	.long uhoh \| 7: TRAPcc, TRAPV instructions
	43	.long uhoh \| 8: Privilege violation
	44	.long uhoh \| 9: Trace
	45	.long uhoh \| 10: Line 1010 emulator
	46	.long uhoh \| 11: Line 1111 emulator
	47	.long uhoh \| 12: Hardware breakpoint
	48	.long uhoh \| 13: Reserved for coprocessor violation
	49	.long uhoh \| 14: Format error
	50	.long uhoh \| 15: Uninitialized interrupt
	51	.long uhoh \| 16: Unassigned, reserved
	52	.long uhoh \| 17:
	53	.long uhoh \| 18:
	54	.long uhoh \| 19:
	55	.long uhoh \| 20:
	56	.long uhoh \| 21:
	57	.long uhoh \| 22:
	58	.long uhoh \| 23:
[e2d79559]	59	.long spurious_interrupt \| 24: Spurious interrupt
[457b6ae]	60	.long uhoh \| 25: Level 1 interrupt autovector
	61	.long uhoh \| 26: Level 2 interrupt autovector
	62	.long uhoh \| 27: Level 3 interrupt autovector
	63	.long uhoh \| 28: Level 4 interrupt autovector
	64	.long uhoh \| 29: Level 5 interrupt autovector
	65	.long uhoh \| 30: Level 6 interrupt autovector
	66	.long uhoh \| 31: Level 7 interrupt autovector
	67	.long uhoh \| 32: Trap instruction (0-15)
	68	.long uhoh \| 33:
	69	.long uhoh \| 34:
	70	.long uhoh \| 35:
	71	.long uhoh \| 36:
	72	.long uhoh \| 37:
	73	.long uhoh \| 38:
	74	.long uhoh \| 39:
	75	.long uhoh \| 40:
	76	.long uhoh \| 41:
	77	.long uhoh \| 42:
	78	.long uhoh \| 43:
	79	.long uhoh \| 44:
	80	.long uhoh \| 45:
	81	.long uhoh \| 46:
	82	.long uhoh \| 47:
	83	.long uhoh \| 48: Reserved for coprocessor
	84	.long uhoh \| 49:
	85	.long uhoh \| 50:
	86	.long uhoh \| 51:
	87	.long uhoh \| 52:
	88	.long uhoh \| 53:
	89	.long uhoh \| 54:
	90	.long uhoh \| 55:
	91	.long uhoh \| 56:
	92	.long uhoh \| 57:
	93	.long uhoh \| 58:
	94	.long uhoh \| 59: Unassigned, reserved
	95	.long uhoh \| 60:
	96	.long uhoh \| 61:
	97	.long uhoh \| 62:
	98	.long uhoh \| 63:
	99	.long uhoh \| 64: User defined vectors (192)
	100	.long uhoh \| 65:
	101	.long uhoh \| 66:
	102	.long uhoh \| 67:
	103	.long uhoh \| 68:
	104	.long uhoh \| 69:
	105	.long uhoh \| 70:
	106	.long uhoh \| 71:
	107	.long uhoh \| 72:
	108	.long uhoh \| 73:
	109	.long uhoh \| 74:
	110	.long uhoh \| 75:
	111	.long uhoh \| 76:
	112	.long uhoh \| 77:
	113	.long uhoh \| 78:
	114	.long uhoh \| 79:
	115	.long uhoh \| 80:
	116	.long uhoh \| 81:
	117	.long uhoh \| 82:
	118	.long uhoh \| 83:
	119	.long uhoh \| 84:
	120	.long uhoh \| 85:
	121	.long uhoh \| 86:
	122	.long uhoh \| 87:
	123	.long uhoh \| 88:
	124	.long uhoh \| 89:
	125	.long uhoh \| 90:
	126	.long uhoh \| 91:
	127	.long uhoh \| 92:
	128	.long uhoh \| 93:
	129	.long uhoh \| 94:
	130	.long uhoh \| 95:
	131	.long uhoh \| 96:
	132	.long uhoh \| 97:
	133	.long uhoh \| 98:
	134	.long uhoh \| 99:
	135	.long uhoh \| 100:
	136	.long uhoh \| 101:
	137	.long uhoh \| 102:
	138	.long uhoh \| 103:
	139	.long uhoh \| 104:
	140	.long uhoh \| 105:
	141	.long uhoh \| 106:
	142	.long uhoh \| 107:
	143	.long uhoh \| 108:
	144	.long uhoh \| 109:
	145	.long uhoh \| 110:
	146	.long uhoh \| 111:
	147	.long uhoh \| 112:
	148	.long uhoh \| 113:
	149	.long uhoh \| 114:
	150	.long uhoh \| 115:
	151	.long uhoh \| 116:
	152	.long uhoh \| 117:
	153	.long uhoh \| 118:
	154	.long uhoh \| 119:
	155	.long uhoh \| 120:
	156	.long uhoh \| 121:
	157	.long uhoh \| 122:
	158	.long uhoh \| 123:
	159	.long uhoh \| 124:
	160	.long uhoh \| 125:
	161	.long uhoh \| 126:
	162	.long uhoh \| 127:
	163	.long uhoh \| 128:
	164	.long uhoh \| 129:
	165	.long uhoh \| 130:
	166	.long uhoh \| 131:
	167	.long uhoh \| 132:
	168	.long uhoh \| 133:
	169	.long uhoh \| 134:
	170	.long uhoh \| 135:
	171	.long uhoh \| 136:
	172	.long uhoh \| 137:
	173	.long uhoh \| 138:
	174	.long uhoh \| 139:
	175	.long uhoh \| 140:
	176	.long uhoh \| 141:
	177	.long uhoh \| 142:
	178	.long uhoh \| 143:
	179	.long uhoh \| 144:
	180	.long uhoh \| 145:
	181	.long uhoh \| 146:
	182	.long uhoh \| 147:
	183	.long uhoh \| 148:
	184	.long uhoh \| 149:
	185	.long uhoh \| 150:
	186	.long uhoh \| 151:
	187	.long uhoh \| 152:
	188	.long uhoh \| 153:
	189	.long uhoh \| 154:
	190	.long uhoh \| 155:
	191	.long uhoh \| 156:
	192	.long uhoh \| 157:
	193	.long uhoh \| 158:
	194	.long uhoh \| 159:
	195	.long uhoh \| 160:
	196	.long uhoh \| 161:
	197	.long uhoh \| 162:
	198	.long uhoh \| 163:
	199	.long uhoh \| 164:
	200	.long uhoh \| 165:
	201	.long uhoh \| 166:
	202	.long uhoh \| 167:
	203	.long uhoh \| 168:
	204	.long uhoh \| 169:
	205	.long uhoh \| 170:
	206	.long uhoh \| 171:
	207	.long uhoh \| 172:
	208	.long uhoh \| 173:
	209	.long uhoh \| 174:
	210	.long uhoh \| 175:
	211	.long uhoh \| 176:
	212	.long uhoh \| 177:
	213	.long uhoh \| 178:
	214	.long uhoh \| 179:
	215	.long uhoh \| 180:
	216	.long uhoh \| 181:
	217	.long uhoh \| 182:
	218	.long uhoh \| 183:
	219	.long uhoh \| 184:
	220	.long uhoh \| 185:
	221	.long uhoh \| 186:
	222	.long uhoh \| 187:
	223	.long uhoh \| 188:
	224	.long uhoh \| 189:
	225	.long uhoh \| 190:
	226	.long uhoh \| 191:
	227	.long uhoh \| 192:
	228	.long uhoh \| 193:
	229	.long uhoh \| 194:
	230	.long uhoh \| 195:
	231	.long uhoh \| 196:
	232	.long uhoh \| 197:
	233	.long uhoh \| 198:
	234	.long uhoh \| 199:
	235	.long uhoh \| 200:
	236	.long uhoh \| 201:
	237	.long uhoh \| 202:
	238	.long uhoh \| 203:
	239	.long uhoh \| 204:
	240	.long uhoh \| 205:
	241	.long uhoh \| 206:
	242	.long uhoh \| 207:
	243	.long uhoh \| 208:
	244	.long uhoh \| 209:
	245	.long uhoh \| 210:
	246	.long uhoh \| 211:
	247	.long uhoh \| 212:
	248	.long uhoh \| 213:
	249	.long uhoh \| 214:
	250	.long uhoh \| 215:
	251	.long uhoh \| 216:
	252	.long uhoh \| 217:
	253	.long uhoh \| 218:
	254	.long uhoh \| 219:
	255	.long uhoh \| 220:
	256	.long uhoh \| 221:
	257	.long uhoh \| 222:
	258	.long uhoh \| 223:
	259	.long uhoh \| 224:
	260	.long uhoh \| 225:
	261	.long uhoh \| 226:
	262	.long uhoh \| 227:
	263	.long uhoh \| 228:
	264	.long uhoh \| 229:
	265	.long uhoh \| 230:
	266	.long uhoh \| 231:
	267	.long uhoh \| 232:
	268	.long uhoh \| 233:
	269	.long uhoh \| 234:
	270	.long uhoh \| 235:
	271	.long uhoh \| 236:
	272	.long uhoh \| 237:
	273	.long uhoh \| 238:
	274	.long uhoh \| 239:
	275	.long uhoh \| 240:
	276	.long uhoh \| 241:
	277	.long uhoh \| 242:
	278	.long uhoh \| 243:
	279	.long uhoh \| 244:
	280	.long uhoh \| 245:
	281	.long uhoh \| 246:
	282	.long uhoh \| 247:
	283	.long uhoh \| 248:
	284	.long uhoh \| 249:
	285	.long uhoh \| 250:
	286	.long uhoh \| 251:
	287	.long uhoh \| 252:
	288	.long uhoh \| 253:
	289	.long uhoh \| 254:
	290	.long uhoh \| 255:
	291
	292	/*
	293	* Default trap handler
	294	* With an oscilloscope you can see AS* stop
	295	*/
	296	uhoh: nop \| Leave spot for breakpoint
	297	stop #0x2700 \| Stop with interrupts disabled
[487a7ca]	298	bra.s uhoh \| Stuck forever
[457b6ae]	299
[e2d79559]	300	/*
	301	* Log, but otherwise ignore, spurious interrupts
	302	*/
	303	spurious_interrupt:
	304	addql #1,SYM(_M68kSpuriousInterruptCount)
	305	rte
	306
[457b6ae]	307	/*
[996a9cb4]	308	* Place the low-order 3 octets of the board's ethernet address at
	309	* a `well-known' fixed location relative to the beginning of ROM.
[457b6ae]	310	*/
	311	.align 2
[996a9cb4]	312	.long ETHERNET_ADDRESS \| Low-order 3 octets of ethernet address
[457b6ae]	313
[f8f370b6]	314	.global start
[457b6ae]	315	/*
	316	* Initial PC
	317	*/
	318	start:
	319	/*
	320	* Step 2: Stay in Supervisor Mode
	321	*/
[f8f370b6]	322	#if ( M68K_HAS_SEPARATE_STACKS == 1 )
	323	oriw #0x3000,sr \| Switch to Master Stack Pointer
	324	lea SYM(m360)+1024-64,a7 \| Load stack pointer with space
	325	\| for the Interrupt Stack
	326	#endif
[457b6ae]	327
	328	/*
	329	* Step 3: Write the VBR
	330	*/
	331	lea Entry,a0 \| Get base of vector table
[487a7ca]	332	movec a0,vbr \| Set up the VBR
[457b6ae]	333
	334	/*
	335	* Step 4: Write the MBAR
	336	*/
[487a7ca]	337	movec dfc,d1 \| Save destination register
[457b6ae]	338	moveq #7,d0 \| CPU-space funcction code
[487a7ca]	339	movec d0,dfc \| Set destination function code register
[457b6ae]	340	movel #SYM(m360)+0x101,d0 \| MBAR value (mask CPU space accesses)
	341	movesl d0,0x3FF00 \| Set MBAR
[487a7ca]	342	movec d1,dfc \| Restore destination register
[457b6ae]	343
	344	/*
	345	* Step 5: Verify a dual-port RAM location
	346	*/
	347	lea SYM(m360),a0 \| Point a0 to first DPRAM location
	348	moveb #0x33,d0 \| Set the test value
	349	moveb d0,a0@ \| Set the memory location
	350	cmpb a0@,d0 \| Does it read back?
	351	bne uhoh \| If not, bad news!
	352	notb d0 \| Flip bits
	353	moveb d0,a0@ \| Set the memory location
	354	cmpb a0@,d0 \| Does it read back?
	355	bne uhoh \| If not, bad news!
	356
	357	/*
	358	* Remaining steps are handled by C code
	359	*/
	360	jmp SYM(_Init68360) \| Start C code (which never returns)
	361
	362	/*
[996a9cb4]	363	* Copy DATA segment, clear BSS segment, set up real stack,
	364	* initialize heap, start C program.
	365	* Assume that DATA and BSS sizes are multiples of 4.
[457b6ae]	366	*/
[996a9cb4]	367	PUBLIC (_CopyDataClearBSSAndStart)
	368	SYM(_CopyDataClearBSSAndStart):
	369	lea copy_start,a0 \| Get start of DATA in RAM
	370	lea SYM(etext),a2 \| Get start of DATA in ROM
	371	cmpl a0,a2 \| Are they the same?
	372	beq.s NOCOPY \| Yes, no copy necessary
	373	lea copy_end,a1 \| Get end of DATA in RAM
	374	bra.s COPYLOOPTEST \| Branch into copy loop
	375	COPYLOOP:
	376	movel a2@+,a0@+ \| Copy word from ROM to RAM
	377	COPYLOOPTEST:
	378	cmpl a1,a0 \| Done?
	379	bcs.s COPYLOOP \| No, skip
	380	NOCOPY:
	381
	382	lea clear_start,a0 \| Get start of BSS
	383	lea clear_end,a1 \| Get end of BSS
	384	clrl d0 \| Value to set
	385	bra.s ZEROLOOPTEST \| Branch into clear loop
[457b6ae]	386	ZEROLOOP:
[996a9cb4]	387	movel d0,a0@+ \| Clear a word
[457b6ae]	388	ZEROLOOPTEST:
[996a9cb4]	389	cmpl a1,a0 \| Done?
	390	bcs.s ZEROLOOP \| No, skip
	391
[457b6ae]	392	movel #stack_init,a7 \| set master stack pointer
	393	movel d0,a7@- \| environp
	394	movel d0,a7@- \| argv
	395	movel d0,a7@- \| argc
	396	jsr SYM(main) \| Call C main
	397
	398	\| Should this just force a reset?
	399	mainDone: nop \| Leave spot for breakpoint
[e2d79559]	400	movew #1,a7 \| Force a double bus error
	401	movel d0,a7@- \| This should cause a RESET
[457b6ae]	402	stop #0x2700 \| Stop with interrupts disabled
[487a7ca]	403	bra.s mainDone \| Stuck forever
[457b6ae]	404
	405	.align 2
	406	PUBLIC (_HeapSize)
	407	SYM (_HeapSize):
	408	.long HeapSize
	409	PUBLIC (_StackSize)
	410	SYM (_StackSize):
	411	.long StackSize
	412	END_CODE
	413
[e2d79559]	414	BEGIN_DATA_DCL
[457b6ae]	415	.align 2
	416	PUBLIC (environ)
	417	SYM (environ):
	418	.long 0
[e2d79559]	419	PUBLIC (_M68kSpuriousInterruptCount)
	420	SYM (_M68kSpuriousInterruptCount):
	421	.long 0
	422	END_DATA_DCL
	423
[457b6ae]	424	END

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