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source: rtems/c/src/lib/libbsp/m68k/gen68360/network/network.c @ a9d04b1c

4.104.114.84.95

Last change on this file since a9d04b1c was a9d04b1c, checked in by Joel Sherrill <joel.sherrill@…>, on 02/08/00 at 18:26:40
Patch from Eric Norum <eric@…> to remove race conditions when setting up receive buffer descriptors and when unmasking interrupts.
Property mode set to `100644`
File size: 21.4 KB

Line
1	/*
2	* RTEMS driver for M68360 SCC1 Ethernet
3	*
4	* W. Eric Norum
5	* Saskatchewan Accelerator Laboratory
6	* University of Saskatchewan
7	* Saskatoon, Saskatchewan, CANADA
8	* eric@skatter.usask.ca
9	*
10	* $Id$
11	*/
12	#include <bsp.h>
13	#include <m68360.h>
14	#include <stdio.h>
15	#include <rtems/error.h>
16	#include <rtems/rtems_bsdnet.h>
17
18	#include <sys/param.h>
19	#include <sys/mbuf.h>
20	#include <sys/socket.h>
21	#include <sys/sockio.h>
22
23	#include <net/if.h>
24
25	#include <netinet/in.h>
26	#include <netinet/if_ether.h>
27
28	/*
29	* Number of SCCs supported by this driver
30	*/
31	#define NSCCDRIVER 1
32
33	/*
34	* Default number of buffer descriptors set aside for this driver.
35	* The number of transmit buffer descriptors has to be quite large
36	* since a single frame often uses four or more buffer descriptors.
37	*/
38	#define RX_BUF_COUNT 15
39	#define TX_BUF_COUNT 4
40	#define TX_BD_PER_BUF 4
41
42	/*
43	* RTEMS event used by interrupt handler to signal driver tasks.
44	* This must not be any of the events used by the network task synchronization.
45	*/
46	#define INTERRUPT_EVENT RTEMS_EVENT_1
47
48	/*
49	* RTEMS event used to start transmit daemon.
50	* This must not be the same as INTERRUPT_EVENT.
51	*/
52	#define START_TRANSMIT_EVENT RTEMS_EVENT_2
53
54	/*
55	* Receive buffer size -- Allow for a full ethernet packet including CRC
56	*/
57	#define RBUF_SIZE 1520
58
59	#if (MCLBYTES < RBUF_SIZE)
60	# error "Driver must have MCLBYTES > RBUF_SIZE"
61	#endif
62
63	/*
64	* Per-device data
65	*/
66	struct scc_softc {
67	struct arpcom arpcom;
68	struct mbuf **rxMbuf;
69	struct mbuf **txMbuf;
70	int acceptBroadcast;
71	int rxBdCount;
72	int txBdCount;
73	int txBdHead;
74	int txBdTail;
75	int txBdActiveCount;
76	m360BufferDescriptor_t *rxBdBase;
77	m360BufferDescriptor_t *txBdBase;
78	rtems_id rxDaemonTid;
79	rtems_id txDaemonTid;
80
81	/*
82	* Statistics
83	*/
84	unsigned long rxInterrupts;
85	unsigned long rxNotFirst;
86	unsigned long rxNotLast;
87	unsigned long rxGiant;
88	unsigned long rxNonOctet;
89	unsigned long rxRunt;
90	unsigned long rxBadCRC;
91	unsigned long rxOverrun;
92	unsigned long rxCollision;
93
94	unsigned long txInterrupts;
95	unsigned long txDeferred;
96	unsigned long txHeartbeat;
97	unsigned long txLateCollision;
98	unsigned long txRetryLimit;
99	unsigned long txUnderrun;
100	unsigned long txLostCarrier;
101	unsigned long txRawWait;
102	};
103	static struct scc_softc scc_softc[NSCCDRIVER];
104
105	/*
106	* SCC1 interrupt handler
107	*/
108	static rtems_isr
109	m360Enet_interrupt_handler (rtems_vector_number v)
110	{
111	/*
112	* Frame received?
113	*/
114	if ((m360.scc1.sccm & 0x8) && (m360.scc1.scce & 0x8)) {
115	m360.scc1.scce = 0x8;
116	m360.scc1.sccm &= ~0x8;
117	scc_softc[0].rxInterrupts++;
118	rtems_event_send (scc_softc[0].rxDaemonTid, INTERRUPT_EVENT);
119	}
120
121	/*
122	* Buffer transmitted or transmitter error?
123	*/
124	if ((m360.scc1.sccm & 0x12) && (m360.scc1.scce & 0x12)) {
125	m360.scc1.scce = 0x12;
126	m360.scc1.sccm &= ~0x12;
127	scc_softc[0].txInterrupts++;
128	rtems_event_send (scc_softc[0].txDaemonTid, INTERRUPT_EVENT);
129	}
130	m360.cisr = 1UL << 30; /* Clear SCC1 interrupt-in-service bit */
131	}
132
133	/*
134	* Initialize the ethernet hardware
135	*/
136	static void
137	m360Enet_initialize_hardware (struct scc_softc *sc)
138	{
139	int i;
140	unsigned char *hwaddr;
141	rtems_status_code status;
142	rtems_isr_entry old_handler;
143
144	/*
145	* Configure port A CLK1, CLK2, TXD1 and RXD1 pins
146	*/
147	m360.papar \|= 0x303;
148	m360.padir &= ~0x303;
149	m360.paodr &= ~0x303;
150
151	/*
152	* Configure port C CTS1* and CD1* pins
153	*/
154	m360.pcpar &= ~0x30;
155	m360.pcdir &= ~0x30;
156	m360.pcso \|= 0x30;
157
158	/*
159	* Connect CLK1 and CLK2 to SCC1
160	*/
161	m360.sicr &= ~0xFF;
162	m360.sicr \|= (5 << 3) \| 4;
163
164	/*
165	* Allocate mbuf pointers
166	*/
167	sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT);
168	sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT);
169	if (!sc->rxMbuf \|\| !sc->txMbuf)
170	rtems_panic ("No memory for mbuf pointers");
171
172	/*
173	* Set receiver and transmitter buffer descriptor bases
174	*/
175	sc->rxBdBase = M360AllocateBufferDescriptors(sc->rxBdCount);
176	sc->txBdBase = M360AllocateBufferDescriptors(sc->txBdCount);
177	m360.scc1p.rbase = (char )sc->rxBdBase - (char )&m360;
178	m360.scc1p.tbase = (char )sc->txBdBase - (char )&m360;
179
180	/*
181	* Send "Init parameters" command
182	*/
183	M360ExecuteRISC (M360_CR_OP_INIT_RX_TX \| M360_CR_CHAN_SCC1);
184
185	/*
186	* Set receive and transmit function codes
187	*/
188	m360.scc1p.rfcr = M360_RFCR_MOT \| M360_RFCR_DMA_SPACE;
189	m360.scc1p.tfcr = M360_TFCR_MOT \| M360_TFCR_DMA_SPACE;
190
191	/*
192	* Set maximum receive buffer length
193	*/
194	m360.scc1p.mrblr = RBUF_SIZE;
195
196	/*
197	* Set CRC parameters
198	*/
199	m360.scc1p.un.ethernet.c_pres = 0xFFFFFFFF;
200	m360.scc1p.un.ethernet.c_mask = 0xDEBB20E3;
201
202	/*
203	* Clear diagnostic counters
204	*/
205	m360.scc1p.un.ethernet.crcec = 0;
206	m360.scc1p.un.ethernet.alec = 0;
207	m360.scc1p.un.ethernet.disfc = 0;
208
209	/*
210	* Set pad value
211	*/
212	m360.scc1p.un.ethernet.pads = 0x8888;
213
214	/*
215	* Set retry limit
216	*/
217	m360.scc1p.un.ethernet.ret_lim = 15;
218
219	/*
220	* Set maximum and minimum frame length
221	*/
222	m360.scc1p.un.ethernet.mflr = 1518;
223	m360.scc1p.un.ethernet.minflr = 64;
224	m360.scc1p.un.ethernet.maxd1 = RBUF_SIZE;
225	m360.scc1p.un.ethernet.maxd2 = RBUF_SIZE;
226
227	/*
228	* Clear group address hash table
229	*/
230	m360.scc1p.un.ethernet.gaddr1 = 0;
231	m360.scc1p.un.ethernet.gaddr2 = 0;
232	m360.scc1p.un.ethernet.gaddr3 = 0;
233	m360.scc1p.un.ethernet.gaddr4 = 0;
234
235	/*
236	* Set our physical address
237	*/
238	hwaddr = sc->arpcom.ac_enaddr;
239	m360.scc1p.un.ethernet.paddr_h = (hwaddr[5] << 8) \| hwaddr[4];
240	m360.scc1p.un.ethernet.paddr_m = (hwaddr[3] << 8) \| hwaddr[2];
241	m360.scc1p.un.ethernet.paddr_l = (hwaddr[1] << 8) \| hwaddr[0];
242
243	/*
244	* Aggressive retry
245	*/
246	m360.scc1p.un.ethernet.p_per = 0;
247
248	/*
249	* Clear individual address hash table
250	*/
251	m360.scc1p.un.ethernet.iaddr1 = 0;
252	m360.scc1p.un.ethernet.iaddr2 = 0;
253	m360.scc1p.un.ethernet.iaddr3 = 0;
254	m360.scc1p.un.ethernet.iaddr4 = 0;
255
256	/*
257	* Set up receive buffer descriptors
258	*/
259	for (i = 0 ; i < sc->rxBdCount ; i++)
260	(sc->rxBdBase + i)->status = 0;
261
262	/*
263	* Set up transmit buffer descriptors
264	*/
265	for (i = 0 ; i < sc->txBdCount ; i++) {
266	(sc->txBdBase + i)->status = 0;
267	sc->txMbuf[i] = NULL;
268	}
269	sc->txBdHead = sc->txBdTail = 0;
270	sc->txBdActiveCount = 0;
271
272	/*
273	* Clear any outstanding events
274	*/
275	m360.scc1.scce = 0xFFFF;
276
277	/*
278	* Set up interrupts
279	*/
280	status = rtems_interrupt_catch (m360Enet_interrupt_handler,
281	(m360.cicr & 0xE0) \| 0x1E,
282	&old_handler);
283	if (status != RTEMS_SUCCESSFUL)
284	rtems_panic ("Can't attach M360 SCC1 interrupt handler: %s\n",
285	rtems_status_text (status));
286	m360.scc1.sccm = 0; /* No interrupts unmasked till necessary */
287	m360.cimr \|= (1UL << 30); /* Enable SCC1 interrupt */
288
289	/*
290	* Set up General SCC Mode Register
291	* Ethernet configuration
292	*/
293	m360.scc1.gsmr_h = 0x0;
294	m360.scc1.gsmr_l = 0x1088000c;
295
296	/*
297	* Set up data synchronization register
298	* Ethernet synchronization pattern
299	*/
300	m360.scc1.dsr = 0xd555;
301
302	/*
303	* Set up protocol-specific mode register
304	* Heartbeat check
305	* No force collision
306	* Discard short frames
307	* Individual address mode
308	* Ethernet CRC
309	* Not promisuous
310	* Ignore/accept broadcast packets as specified
311	* Normal backoff timer
312	* No loopback
313	* No input sample at end of frame
314	* 64-byte limit for late collision
315	* Wait 22 bits before looking for start of frame delimiter
316	* Disable full-duplex operation
317	*/
318	m360.scc1.psmr = 0x880A \| (sc->acceptBroadcast ? 0 : 0x100);
319
320	/*
321	* Enable the TENA (RTS1*) pin
322	*/
323	#if (defined (M68360_ATLAS_HSB))
324	m360.pbpar \|= 0x1000;
325	m360.pbdir \|= 0x1000;
326	#else
327	m360.pcpar \|= 0x1;
328	m360.pcdir &= ~0x1;
329	#endif
330	}
331
332	/*
333	* Soak up buffer descriptors that have been sent
334	* Note that a buffer descriptor can't be retired as soon as it becomes
335	* ready. The MC68360 Errata (May 96) says that, "If an Ethernet frame is
336	* made up of multiple buffers, the user should not reuse the first buffer
337	* descriptor until the last buffer descriptor of the frame has had its
338	* ready bit cleared by the CPM".
339	*/
340	static void
341	m360Enet_retire_tx_bd (struct scc_softc *sc)
342	{
343	rtems_unsigned16 status;
344	int i;
345	int nRetired;
346	struct mbuf m, n;
347
348	i = sc->txBdTail;
349	nRetired = 0;
350	while ((sc->txBdActiveCount != 0)
351	&& (((status = (sc->txBdBase + i)->status) & M360_BD_READY) == 0)) {
352	/*
353	* See if anything went wrong
354	*/
355	if (status & (M360_BD_DEFER \|
356	M360_BD_HEARTBEAT \|
357	M360_BD_LATE_COLLISION \|
358	M360_BD_RETRY_LIMIT \|
359	M360_BD_UNDERRUN \|
360	M360_BD_CARRIER_LOST)) {
361	/*
362	* Check for errors which stop the transmitter.
363	*/
364	if (status & (M360_BD_LATE_COLLISION \|
365	M360_BD_RETRY_LIMIT \|
366	M360_BD_UNDERRUN)) {
367	if (status & M360_BD_LATE_COLLISION)
368	scc_softc[0].txLateCollision++;
369	if (status & M360_BD_RETRY_LIMIT)
370	scc_softc[0].txRetryLimit++;
371	if (status & M360_BD_UNDERRUN)
372	scc_softc[0].txUnderrun++;
373
374	/*
375	* Restart the transmitter
376	*/
377	M360ExecuteRISC (M360_CR_OP_RESTART_TX \| M360_CR_CHAN_SCC1);
378	}
379	if (status & M360_BD_DEFER)
380	scc_softc[0].txDeferred++;
381	if (status & M360_BD_HEARTBEAT)
382	scc_softc[0].txHeartbeat++;
383	if (status & M360_BD_CARRIER_LOST)
384	scc_softc[0].txLostCarrier++;
385	}
386	nRetired++;
387	if (status & M360_BD_LAST) {
388	/*
389	* A full frame has been transmitted.
390	* Free all the associated buffer descriptors.
391	*/
392	sc->txBdActiveCount -= nRetired;
393	while (nRetired) {
394	nRetired--;
395	m = sc->txMbuf[sc->txBdTail];
396	MFREE (m, n);
397	if (++sc->txBdTail == sc->txBdCount)
398	sc->txBdTail = 0;
399	}
400	}
401	if (++i == sc->txBdCount)
402	i = 0;
403	}
404	}
405
406	/*
407	* SCC reader task
408	*/
409	static void
410	scc_rxDaemon (void *arg)
411	{
412	struct scc_softc sc = (struct scc_softc )arg;
413	struct ifnet *ifp = &sc->arpcom.ac_if;
414	struct mbuf *m;
415	rtems_unsigned16 status;
416	volatile m360BufferDescriptor_t *rxBd;
417	int rxBdIndex;
418
419	/*
420	* Allocate space for incoming packets and start reception
421	*/
422	for (rxBdIndex = 0 ; ;) {
423	rxBd = sc->rxBdBase + rxBdIndex;
424	MGETHDR (m, M_WAIT, MT_DATA);
425	MCLGET (m, M_WAIT);
426	m->m_pkthdr.rcvif = ifp;
427	sc->rxMbuf[rxBdIndex] = m;
428	rxBd->buffer = mtod (m, void *);
429	if (++rxBdIndex == sc->rxBdCount) {
430	rxBd->status = M360_BD_EMPTY \| M360_BD_INTERRUPT \| M360_BD_WRAP;
431	break;
432	}
433	rxBd->status = M360_BD_EMPTY \| M360_BD_INTERRUPT;
434	}
435
436	/*
437	* Input packet handling loop
438	*/
439	rxBdIndex = 0;
440	for (;;) {
441	rxBd = sc->rxBdBase + rxBdIndex;
442
443	/*
444	* Wait for packet if there's not one ready
445	*/
446	if ((status = rxBd->status) & M360_BD_EMPTY) {
447	/*
448	* Clear old events
449	*/
450	m360.scc1.scce = 0x8;
451
452	/*
453	* Wait for packet
454	* Note that the buffer descriptor is checked
455	* before the event wait -- this catches the
456	* possibility that a packet arrived between the
457	* `if' above, and the clearing of the event register.
458	*/
459	while ((status = rxBd->status) & M360_BD_EMPTY) {
460	rtems_interrupt_level level;
461	rtems_event_set events;
462
463	/*
464	* Unmask RXF (Full frame received) event
465	*/
466	rtems_interrupt_disable (level);
467	m360.scc1.sccm \|= 0x8;
468	rtems_interrupt_enable (level);
469
470	rtems_bsdnet_event_receive (INTERRUPT_EVENT,
471	RTEMS_WAIT\|RTEMS_EVENT_ANY,
472	RTEMS_NO_TIMEOUT,
473	&events);
474	}
475	}
476
477	/*
478	* Check that packet is valid
479	*/
480	if ((status & (M360_BD_LAST \|
481	M360_BD_FIRST_IN_FRAME \|
482	M360_BD_LONG \|
483	M360_BD_NONALIGNED \|
484	M360_BD_SHORT \|
485	M360_BD_CRC_ERROR \|
486	M360_BD_OVERRUN \|
487	M360_BD_COLLISION)) ==
488	(M360_BD_LAST \|
489	M360_BD_FIRST_IN_FRAME)) {
490	/*
491	* Pass the packet up the chain.
492	* FIXME: Packet filtering hook could be done here.
493	*/
494	struct ether_header *eh;
495
496	m = sc->rxMbuf[rxBdIndex];
497	m->m_len = m->m_pkthdr.len = rxBd->length -
498	sizeof(rtems_unsigned32) -
499	sizeof(struct ether_header);
500	eh = mtod (m, struct ether_header *);
501	m->m_data += sizeof(struct ether_header);
502	ether_input (ifp, eh, m);
503
504	/*
505	* Allocate a new mbuf
506	*/
507	MGETHDR (m, M_WAIT, MT_DATA);
508	MCLGET (m, M_WAIT);
509	m->m_pkthdr.rcvif = ifp;
510	sc->rxMbuf[rxBdIndex] = m;
511	rxBd->buffer = mtod (m, void *);
512	}
513	else {
514	/*
515	* Something went wrong with the reception
516	*/
517	if (!(status & M360_BD_LAST))
518	sc->rxNotLast++;
519	if (!(status & M360_BD_FIRST_IN_FRAME))
520	sc->rxNotFirst++;
521	if (status & M360_BD_LONG)
522	sc->rxGiant++;
523	if (status & M360_BD_NONALIGNED)
524	sc->rxNonOctet++;
525	if (status & M360_BD_SHORT)
526	sc->rxRunt++;
527	if (status & M360_BD_CRC_ERROR)
528	sc->rxBadCRC++;
529	if (status & M360_BD_OVERRUN)
530	sc->rxOverrun++;
531	if (status & M360_BD_COLLISION)
532	sc->rxCollision++;
533	}
534
535	/*
536	* Reenable the buffer descriptor
537	*/
538	rxBd->status = (status & (M360_BD_WRAP \| M360_BD_INTERRUPT)) \| M360_BD_EMPTY;
539
540	/*
541	* Move to next buffer descriptor
542	*/
543	if (++rxBdIndex == sc->rxBdCount)
544	rxBdIndex = 0;
545	}
546	}
547
548	static void
549	sendpacket (struct ifnet ifp, struct mbuf m)
550	{
551	struct scc_softc *sc = ifp->if_softc;
552	volatile m360BufferDescriptor_t firstTxBd, txBd;
553	struct mbuf *l = NULL;
554	rtems_unsigned16 status;
555	int nAdded;
556
557	/*
558	* Free up buffer descriptors
559	*/
560	m360Enet_retire_tx_bd (sc);
561
562	/*
563	* Set up the transmit buffer descriptors.
564	* No need to pad out short packets since the
565	* hardware takes care of that automatically.
566	* No need to copy the packet to a contiguous buffer
567	* since the hardware is capable of scatter/gather DMA.
568	*/
569	status = 0;
570	nAdded = 0;
571	txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
572	while (m) {
573	/*
574	* Wait for buffer descriptor to become available.
575	*/
576	if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
577	/*
578	* Clear old events
579	*/
580	m360.scc1.scce = 0x12;
581
582	/*
583	* Wait for buffer descriptor to become available.
584	* Note that the buffer descriptors are checked
585	* before entering the wait loop -- this catches
586	* the possibility that a buffer descriptor became
587	* available between the `if' above, and the clearing
588	* of the event register.
589	* This is to catch the case where the transmitter
590	* stops in the middle of a frame -- and only the
591	* last buffer descriptor in a frame can generate
592	* an interrupt.
593	*/
594	m360Enet_retire_tx_bd (sc);
595	while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
596	rtems_interrupt_level level;
597	rtems_event_set events;
598
599	/*
600	* Unmask TXB (buffer transmitted) and
601	* TXE (transmitter error) events.
602	*/
603	rtems_interrupt_disable (level);
604	m360.scc1.sccm \|= 0x12;
605	rtems_interrupt_enable (level);
606	rtems_bsdnet_event_receive (INTERRUPT_EVENT,
607	RTEMS_WAIT\|RTEMS_EVENT_ANY,
608	RTEMS_NO_TIMEOUT,
609	&events);
610	m360Enet_retire_tx_bd (sc);
611	}
612	}
613
614	/*
615	* The IP fragmentation routine in ip_output
616	* can produce packet fragments with zero length.
617	*/
618	if (m->m_len) {
619	/*
620	* Fill in the buffer descriptor.
621	* Don't set the READY flag in the first buffer
622	* descriptor till the whole packet has been readied.
623	*/
624	txBd = sc->txBdBase + sc->txBdHead;
625	txBd->buffer = mtod (m, void *);
626	txBd->length = m->m_len;
627	sc->txMbuf[sc->txBdHead] = m;
628	status = nAdded ? M360_BD_READY : 0;
629	if (++sc->txBdHead == sc->txBdCount) {
630	status \|= M360_BD_WRAP;
631	sc->txBdHead = 0;
632	}
633	txBd->status = status;
634	l = m;
635	m = m->m_next;
636	nAdded++;
637	}
638	else {
639	/*
640	* Just toss empty mbufs
641	*/
642	struct mbuf *n;
643	MFREE (m, n);
644	m = n;
645	if (l != NULL)
646	l->m_next = m;
647	}
648	}
649	if (nAdded) {
650	/*
651	* Send the packet
652	*/
653	txBd->status = status \| M360_BD_PAD \| M360_BD_LAST \| M360_BD_TX_CRC \| M360_BD_INTERRUPT;
654	firstTxBd->status \|= M360_BD_READY;
655	sc->txBdActiveCount += nAdded;
656	}
657	}
658
659	/*
660	* Driver transmit daemon
661	*/
662	void
663	scc_txDaemon (void *arg)
664	{
665	struct scc_softc sc = (struct scc_softc )arg;
666	struct ifnet *ifp = &sc->arpcom.ac_if;
667	struct mbuf *m;
668	rtems_event_set events;
669
670	for (;;) {
671	/*
672	* Wait for packet
673	*/
674	rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY \| RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
675
676	/*
677	* Send packets till queue is empty
678	*/
679	for (;;) {
680	/*
681	* Get the next mbuf chain to transmit.
682	*/
683	IF_DEQUEUE(&ifp->if_snd, m);
684	if (!m)
685	break;
686	sendpacket (ifp, m);
687	}
688	ifp->if_flags &= ~IFF_OACTIVE;
689	}
690	}
691
692	/*
693	* Send packet (caller provides header).
694	*/
695	static void
696	scc_start (struct ifnet *ifp)
697	{
698	struct scc_softc *sc = ifp->if_softc;
699
700	rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
701	ifp->if_flags \|= IFF_OACTIVE;
702	}
703
704	/*
705	* Initialize and start the device
706	*/
707	static void
708	scc_init (void *arg)
709	{
710	struct scc_softc *sc = arg;
711	struct ifnet *ifp = &sc->arpcom.ac_if;
712
713	if (sc->txDaemonTid == 0) {
714
715	/*
716	* Set up SCC hardware
717	*/
718	m360Enet_initialize_hardware (sc);
719
720	/*
721	* Start driver tasks
722	*/
723	sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
724	sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
725
726	}
727
728	/*
729	* Set flags appropriately
730	*/
731	if (ifp->if_flags & IFF_PROMISC)
732	m360.scc1.psmr \|= 0x200;
733	else
734	m360.scc1.psmr &= ~0x200;
735
736	/*
737	* Tell the world that we're running.
738	*/
739	ifp->if_flags \|= IFF_RUNNING;
740
741	/*
742	* Enable receiver and transmitter
743	*/
744	m360.scc1.gsmr_l \|= 0x30;
745	}
746
747	/*
748	* Stop the device
749	*/
750	static void
751	scc_stop (struct scc_softc *sc)
752	{
753	struct ifnet *ifp = &sc->arpcom.ac_if;
754
755	ifp->if_flags &= ~IFF_RUNNING;
756
757	/*
758	* Shut down receiver and transmitter
759	*/
760	m360.scc1.gsmr_l &= ~0x30;
761	}
762
763
764	/*
765	* Show interface statistics
766	*/
767	static void
768	scc_stats (struct scc_softc *sc)
769	{
770	printf (" Rx Interrupts:%-8lu", sc->rxInterrupts);
771	printf (" Not First:%-8lu", sc->rxNotFirst);
772	printf (" Not Last:%-8lu\n", sc->rxNotLast);
773	printf (" Giant:%-8lu", sc->rxGiant);
774	printf (" Runt:%-8lu", sc->rxRunt);
775	printf (" Non-octet:%-8lu\n", sc->rxNonOctet);
776	printf (" Bad CRC:%-8lu", sc->rxBadCRC);
777	printf (" Overrun:%-8lu", sc->rxOverrun);
778	printf (" Collision:%-8lu\n", sc->rxCollision);
779	printf (" Discarded:%-8lu\n", (unsigned long)m360.scc1p.un.ethernet.disfc);
780
781	printf (" Tx Interrupts:%-8lu", sc->txInterrupts);
782	printf (" Deferred:%-8lu", sc->txDeferred);
783	printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat);
784	printf (" No Carrier:%-8lu", sc->txLostCarrier);
785	printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
786	printf (" Late Collision:%-8lu\n", sc->txLateCollision);
787	printf (" Underrun:%-8lu", sc->txUnderrun);
788	printf (" Raw output wait:%-8lu\n", sc->txRawWait);
789	}
790
791	/*
792	* Driver ioctl handler
793	*/
794	static int
795	scc_ioctl (struct ifnet *ifp, int command, caddr_t data)
796	{
797	struct scc_softc *sc = ifp->if_softc;
798	int error = 0;
799
800	switch (command) {
801	case SIOCGIFADDR:
802	case SIOCSIFADDR:
803	ether_ioctl (ifp, command, data);
804	break;
805
806	case SIOCSIFFLAGS:
807	switch (ifp->if_flags & (IFF_UP \| IFF_RUNNING)) {
808	case IFF_RUNNING:
809	scc_stop (sc);
810	break;
811
812	case IFF_UP:
813	scc_init (sc);
814	break;
815
816	case IFF_UP \| IFF_RUNNING:
817	scc_stop (sc);
818	scc_init (sc);
819	break;
820
821	default:
822	break;
823	}
824	break;
825
826	case SIO_RTEMS_SHOW_STATS:
827	scc_stats (sc);
828	break;
829
830	/*
831	* FIXME: All sorts of multicast commands need to be added here!
832	*/
833	default:
834	error = EINVAL;
835	break;
836	}
837	return error;
838	}
839
840	/*
841	* Attach an SCC driver to the system
842	*/
843	int
844	rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config)
845	{
846	struct scc_softc *sc;
847	struct ifnet *ifp;
848	int mtu;
849	int unitNumber;
850	char *unitName;
851
852	/*
853	* Parse driver name
854	*/
855	if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
856	return 0;
857
858	/*
859	* Is driver free?
860	*/
861	if ((unitNumber <= 0) \|\| (unitNumber > NSCCDRIVER)) {
862	printf ("Bad SCC unit number.\n");
863	return 0;
864	}
865	sc = &scc_softc[unitNumber - 1];
866	ifp = &sc->arpcom.ac_if;
867	if (ifp->if_softc != NULL) {
868	printf ("Driver already in use.\n");
869	return 0;
870	}
871
872	/*
873	* Process options
874	*/
875	if (config->hardware_address) {
876	memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
877	}
878	else {
879	/*
880	* The first 4 bytes of the bootstrap prom
881	* contain the value loaded into the stack
882	* pointer as part of the CPU32's hardware
883	* reset exception handler. The following
884	* 4 bytes contain the value loaded into the
885	* program counter. The boards' Ethernet
886	* address is stored in the six bytes
887	* immediately preceding this initial
888	* program counter value.
889	*
890	* See start360/start360.s.
891	*/
892	extern void _RomBase; / From linkcmds */
893	const unsigned long *ExceptionVectors;
894	const unsigned char *entryPoint;
895
896	/*
897	* Sanity check -- assume entry point must be
898	* within 1 MByte of beginning of boot ROM.
899	*/
900	ExceptionVectors = (const unsigned long *)&_RomBase;
901	entryPoint = (const unsigned char *)ExceptionVectors[1];
902	if (((unsigned long)entryPoint - (unsigned long)ExceptionVectors)
903	>= (1 * 1024 * 1024)) {
904	printf ("Warning -- Ethernet address can not be found in bootstrap PROM.\n");
905	sc->arpcom.ac_enaddr[0] = 0x08;
906	sc->arpcom.ac_enaddr[1] = 0xF3;
907	sc->arpcom.ac_enaddr[2] = 0x3E;
908	sc->arpcom.ac_enaddr[3] = 0xC2;
909	sc->arpcom.ac_enaddr[4] = 0x7E;
910	sc->arpcom.ac_enaddr[5] = 0x38;
911	}
912	else {
913	memcpy (sc->arpcom.ac_enaddr, entryPoint - ETHER_ADDR_LEN, ETHER_ADDR_LEN);
914	}
915	}
916	if (config->mtu)
917	mtu = config->mtu;
918	else
919	mtu = ETHERMTU;
920	if (config->rbuf_count)
921	sc->rxBdCount = config->rbuf_count;
922	else
923	sc->rxBdCount = RX_BUF_COUNT;
924	if (config->xbuf_count)
925	sc->txBdCount = config->xbuf_count;
926	else
927	sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
928	sc->acceptBroadcast = !config->ignore_broadcast;
929
930	/*
931	* Set up network interface values
932	*/
933	ifp->if_softc = sc;
934	ifp->if_unit = unitNumber;
935	ifp->if_name = unitName;
936	ifp->if_mtu = mtu;
937	ifp->if_init = scc_init;
938	ifp->if_ioctl = scc_ioctl;
939	ifp->if_start = scc_start;
940	ifp->if_output = ether_output;
941	ifp->if_flags = IFF_BROADCAST \| IFF_SIMPLEX;
942	if (ifp->if_snd.ifq_maxlen == 0)
943	ifp->if_snd.ifq_maxlen = ifqmaxlen;
944
945	/*
946	* Attach the interface
947	*/
948	if_attach (ifp);
949	ether_ifattach (ifp);
950	return 1;
951	};

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