source: rtems/c/src/lib/libbsp/m68k/gen68340/timer/timer.c @ 39a9f8e

4.104.115
Last change on this file since 39a9f8e was 39a9f8e, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on 12/17/09 at 08:42:17

adapted to new prototype for *_write function

  • Property mode set to 100644
File size: 8.3 KB
Line 
1/*
2 * ATTENTION: AS MC68349 has no built-in Timer, the following code doesn't work
3 *            in a MC68349. You can't use FIFO full mode for the moment, but
4 *            it should be easy to fix this by using an external timer
5 *
6 * Use TIMER 1 for TIMEOUT when using FIFO FULL mode in UART driver
7 * Use TIMER 2 for timing test suites
8 *
9 * Geoffroy Montel
10 * France Telecom - CNET/DSM/TAM/CAT
11 * 4, rue du Clos Courtel
12 * 35512 CESSON-SEVIGNE
13 * FRANCE
14 *
15 * e-mail: g_montel@yahoo.com
16 *
17 *  $Id$
18 */
19
20/*
21 *
22 *  Input parameters:  NONE
23 *
24 *  Output parameters:  NONE
25 *
26 *  NOTE: It is important that the timer start/stop overhead be
27 *        determined when porting or modifying this code.
28 *
29 *  COPYRIGHT (c) 1989-1999.
30 *  On-Line Applications Research Corporation (OAR).
31 *
32 *  The license and distribution terms for this file may be
33 *  found in the file LICENSE in this distribution or at
34 *  http://www.rtems.com/license/LICENSE.
35 */
36
37#include <rtems.h>
38#include <bsp.h>
39#include <m340uart.h>
40#include <m340timer.h>
41#include <m68340.h>
42
43#define TIMER1_VECTOR 122
44#define TIMER1_IRQ_LEVEL 5
45#define TIMER1_INTERRUPT_ARBITRATION 5
46
47#define TIMER2_VECTOR 123
48#define TIMER2_IRQ_LEVEL 4
49#define TIMER2_INTERRUPT_ARBITRATION 4
50
51#define CLOCK_SPEED 25          /* in Mhz */
52
53#define max(a,b) (((a)>(b)) ? (a) : (b))
54
55void (*Restart_Fifo_Full_A_Timer)(void);
56void (*Restart_Check_A_Timer)(void);
57void (*Restart_Fifo_Full_B_Timer)(void);
58void (*Restart_Check_B_Timer)(void);
59
60int preload = 0;
61
62/******************************************************
63  Name: __Restart_Fifo_Full_Timer
64  Input parameters: -
65  Output parameters: -
66  Description: when a character is received, sets
67               the TIMER to raise an interrupt at
68               TIMEOUT.
69               It's necessary to prevent from not
70               getting n-1 characters (with n the
71               Uart Fifo size)
72 *****************************************************/
73void __Restart_Fifo_Full_Timer (void)
74{
75 TSR1 |= m340_TO;
76 TCR1 &= ~m340_CPE;
77 WPREL11 = preload;
78 TCR1 |= m340_CPE;
79}
80
81/******************************************************
82  Name: __Restart_Fifo_Full_Timer
83  Input parameters: -
84  Output parameters: -
85  Description: when no character has been received
86               recently, check now and then if whether
87               a there's a character in the FIFO
88 *****************************************************/
89void __Restart_Check_Timer (void)
90{
91 TSR1 |= m340_TO;
92 TCR1 &= ~m340_CPE;
93 WPREL11 = 0xFFFF;
94 TCR1 |= m340_CPE;
95}
96
97/******************************************************
98  Name: __do_nothing
99  Input parameters: -
100  Output parameters: -
101  Description: we always restart the fifo full timer
102               with a call to Restart_*_Timer
103               if we do not use FIFO full, Restart_*_Timer
104               are set to do __do_nothing
105 *****************************************************/
106void __do_nothing (void)
107{
108}
109
110#define Fifo_Full_on_A (m340_uart_config[UART_CHANNEL_A].rx_mode==UART_FIFO_FULL && m340_uart_config[UART_CHANNEL_A].enable && m340_uart_config[UART_CHANNEL_A].mode==UART_INTERRUPTS)
111#define Fifo_Full_on_B (m340_uart_config[UART_CHANNEL_B].rx_mode==UART_FIFO_FULL && m340_uart_config[UART_CHANNEL_B].enable && m340_uart_config[UART_CHANNEL_B].mode==UART_INTERRUPTS)
112
113/******************************************************
114  Name: Fifo_Full_benchmark_timer_initialize
115  Input parameters: -
116  Output parameters: -
117  Description: initialize Timer 1 for FIFO full mode
118 *****************************************************/
119void Fifo_Full_benchmark_timer_initialize (void)
120{
121   float max_baud_rate;
122   int prescaler_output_tap = -1;
123   int nb_of_clock_ticks = 0;
124
125   /*
126    *  USE TIMER 1 for UART FIFO FULL mode
127    */
128
129   if ( Fifo_Full_on_A || Fifo_Full_on_B )
130      {
131        /* Disable the timer */
132        TCR1 &= ~m340_SWR;
133
134        /* Reset the interrupts */
135        TSR1 &= ~(m340_TO | m340_TG | m340_TC);
136
137        /* Init the stop bit for normal operation, ignore FREEZE, user privileges,
138           set interrupt arbitration */
139        TMCR1 = TIMER1_INTERRUPT_ARBITRATION;
140
141        /* interrupt priority level and interrupt vector */
142        TIR1 = TIMER1_VECTOR | (TIMER1_IRQ_LEVEL << 8);
143
144        /* compute prescaler */
145        if ( Fifo_Full_on_A && Fifo_Full_on_B)
146                max_baud_rate = max(m340_uart_config[UART_CHANNEL_A].rx_baudrate, m340_uart_config[UART_CHANNEL_B].rx_baudrate);
147        else if ( Fifo_Full_on_A )
148                max_baud_rate = m340_uart_config[UART_CHANNEL_A].rx_baudrate;
149             else max_baud_rate = m340_uart_config[UART_CHANNEL_B].rx_baudrate;
150
151        /* find out config */
152        nb_of_clock_ticks = (10/max_baud_rate)*(CLOCK_SPEED*1000000)*1.2;
153        if (nb_of_clock_ticks < 0xFFFF) {
154           preload = nb_of_clock_ticks;
155           prescaler_output_tap = -1;
156        } else if (nb_of_clock_ticks/2 < 0xFFFF) {
157           preload = nb_of_clock_ticks/2;
158           prescaler_output_tap = m340_Divide_by_2;
159        } else if (nb_of_clock_ticks/4 < 0xFFFF) {
160           preload = nb_of_clock_ticks/4;
161           prescaler_output_tap = m340_Divide_by_4;
162        } else if (nb_of_clock_ticks/8 < 0xFFFF) {
163           preload = nb_of_clock_ticks/8;
164           prescaler_output_tap = m340_Divide_by_16;
165        } else if (nb_of_clock_ticks/16 < 0xFFFF) {
166           preload = nb_of_clock_ticks/16;
167           prescaler_output_tap = m340_Divide_by_16;
168        } else if (nb_of_clock_ticks/32 < 0xFFFF) {
169           preload = nb_of_clock_ticks/32;
170           prescaler_output_tap = m340_Divide_by_32;
171        } else if (nb_of_clock_ticks/64 < 0xFFFF) {
172           preload = nb_of_clock_ticks/64;
173           prescaler_output_tap = m340_Divide_by_64;
174        } else if (nb_of_clock_ticks/128 < 0xFFFF) {
175           preload = nb_of_clock_ticks/128;
176           prescaler_output_tap = m340_Divide_by_128;
177        } else if (nb_of_clock_ticks/256 < 0xFFFF) {
178           preload = nb_of_clock_ticks/256;
179           prescaler_output_tap = m340_Divide_by_256;
180        }
181
182        /* Input Capture/Output Compare (ICOC) */
183        TCR1 = m340_SWR | m340_TO_Enabled | m340_ICOC;
184        if (prescaler_output_tap!=-1) TCR1 |= prescaler_output_tap | m340_PSE;
185
186        /* install interrupt vector */
187        {
188         rtems_isr_entry old_handler;
189         rtems_status_code sc;
190
191         sc = rtems_interrupt_catch (InterruptHandler,
192                                     TIMER1_VECTOR,
193                                     &old_handler);
194
195         /* uncomment this if you want to pass control to your own ISR handler
196            it may be usefull to do so to check for performances with an oscilloscope */
197         /*
198         {
199          proc_ptr ignored;
200          _CPU_ISR_install_raw_handler( TIMER1_VECTOR, _Debug_ISR_Handler_Console, &ignored );
201         }
202         */
203        }
204       } /* fifo full mode on a uart */
205
206       /* install routines */
207       Restart_Check_A_Timer = Fifo_Full_on_A ? __Restart_Check_Timer : __do_nothing;
208       Restart_Fifo_Full_A_Timer = Fifo_Full_on_A ? __Restart_Fifo_Full_Timer : __do_nothing;
209       Restart_Check_B_Timer = Fifo_Full_on_B ? __Restart_Check_Timer : __do_nothing;
210       Restart_Fifo_Full_B_Timer = Fifo_Full_on_B ? __Restart_Fifo_Full_Timer : __do_nothing;
211       /* start checking timer */
212       Restart_Check_A_Timer();
213       Restart_Check_B_Timer();
214}
215
216/******************************************************
217  Name: benchmark_timer_initialize
218  Input parameters: -
219  Output parameters: -
220  Description: init Timer for timing test suites
221 *****************************************************/
222void benchmark_timer_initialize (void)
223{
224        /* Disable the timer */
225        TCR2 &= ~m340_SWR;
226
227        /* Reset the interrupts */
228        TSR2 &= ~(m340_TO | m340_TG | m340_TC);
229
230        /* Init the stop bit for normal operation, ignore FREEZE, user privileges,
231           set interrupt arbitration */
232        TMCR1 = TIMER2_INTERRUPT_ARBITRATION;
233
234        /* interrupt priority level and interrupt vector */
235        TIR1 = TIMER2_VECTOR | (TIMER2_IRQ_LEVEL << 8);
236
237        /* Init the stop bit for normal operation, ignore FREEZE, user privileges,
238           set interrupt arbitration */
239        TMCR2 = TIMER2_INTERRUPT_ARBITRATION;
240
241        /* Preload register 1 */
242        WPREL21 = 0xFFFF;
243
244        /* Input Capture/Output Compare (ICOC) */
245        TCR2 = m340_SWR | m340_ICOC | m340_PSE | m340_Divide_by_16 | m340_CPE;
246}
247
248/******************************************************
249  Name: benchmark_timer_read
250  Input parameters: -
251  Output parameters: -
252  Description: Return timer value in microsecond units
253 *****************************************************/
254int
255benchmark_timer_read (void)
256{
257 /* there's CLOCK_SPEED / 16 micro seconds between two timer register decrement */
258 return (((0xFFFF - TCNTR2) * CLOCK_SPEED) / 16);
259}
260
261/******************************************************
262  Name: benchmark_timer_disable_subtracting_average_overhead
263  Input parameters: -
264  Output parameters: -
265  Description: -
266 *****************************************************/
267void
268benchmark_timer_disable_subtracting_average_overhead(bool find_flag)
269{
270}
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