source: rtems/c/src/lib/libbsp/m68k/gen68340/include/m340uart.h @ cf282090

4.104.114.84.95
Last change on this file since cf282090 was 08311cc3, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 17, 1999 at 5:51:34 PM

Updated copyright notice.

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File size: 4.3 KB
Line 
1/*
2 *  Header file for console driver
3 *  defines for accessing M68340/68349 UART registers
4 *
5 *  Author:
6 *  Geoffroy Montel
7 *  France Telecom - CNET/DSM/TAM/CAT
8 *  4, rue du Clos Courtel
9 *  35512 CESSON-SEVIGNE
10 *  FRANCE
11 *
12 *  e-mail: g_montel@yahoo.com
13 *
14 *
15 *  COPYRIGHT (c) 1989-1999.
16 *  On-Line Applications Research Corporation (OAR).
17 *
18 *  The license and distribution terms for this file may be
19 *  found in the file LICENSE in this distribution or at
20 *
21 *  http://www.OARcorp.com/rtems/license.html.
22 *
23 *  $Id$
24 */
25
26#ifndef __m340uart_H__
27#define __m340uart_H__
28
29/* UART initialisation */
30#define UART_CHANNEL_A                  0
31#define UART_CHANNEL_B                  1
32#define UART_NUMBER_OF_CHANNELS         2
33#define UART_CONSOLE_NAME               "/dev/console"
34#define UART_RAW_IO_NAME                "/dev/tty1"
35#define UART_FIFO_FULL                  0
36#define UART_CRR                        1
37#define UART_INTERRUPTS                 0
38#define UART_POLLING                    1
39#define UART_TERMIOS_CONSOLE            0
40#define UART_TERMIOS_RAW                1
41#define UART_TERMIOS_MIN_DEFAULT        1
42#define UART_TERMIOS_TIME_DEFAULT       0
43
44void Init_UART_Table(void);
45
46typedef struct {
47                rtems_unsigned8         enable;
48                rtems_unsigned16        rx_buffer_size; /* NOT IMPLEMENTED */
49                rtems_unsigned16        tx_buffer_size; /* NOT IMPLEMENTED */
50               } uart_termios_config;
51
52typedef struct { /* for one channel */
53                rtems_unsigned8         enable;         /* use this channel */
54                char                    name[64];       /* use UART_CONSOLE_NAME for console purpose */
55                rtems_unsigned8         parity_mode;    /* parity mode, see MR1 section for defines */
56                rtems_unsigned8         bits_per_char;  /* bits per character, see MR1 section for defines  */
57                float                   rx_baudrate;    /* Rx baudrate */
58                float                   tx_baudrate;    /* Tx baudrate */
59                rtems_unsigned8         rx_mode;        /* FIFO Full (UART_FIFO_FULL) or ChannelReceiverReady (UART_CRR) */
60                rtems_unsigned8         mode;           /* use interrupts (UART_INTERRUPTS) or polling (UART_POLLING) */
61                uart_termios_config     termios;
62               } uart_channel_config;
63
64extern uart_channel_config              m340_uart_config[UART_NUMBER_OF_CHANNELS];
65
66typedef  struct {
67                 int    set;    /* number of the m340 baud speed set */
68                 int    rcs;    /* RCS for the needed baud set */
69                 int    tcs;    /* TCS for the needed baud set */
70                } t_baud_speed;
71
72typedef  struct {
73                 t_baud_speed   baud_speed_table[2];
74                 short          nb;
75                } t_baud_speed_table;
76
77extern t_baud_speed_table
78Find_Right_m340_UART_Config(float ChannelA_ReceiverBaudRate, float ChannelA_TransmitterBaudRate, rtems_unsigned8 enableA,
79                            float ChannelB_ReceiverBaudRate, float ChannelB_TransmitterBaudRate, rtems_unsigned8 enableB);
80
81extern rtems_isr InterruptHandler (rtems_vector_number v);
82
83extern float termios_baud_rates_equivalence ( int speed ) ;
84extern int dbugRead (int minor);
85extern int dbugWrite (int minor, const char *buf, int len);
86
87extern float m340_Baud_Rates_Table[16][2];
88
89/*  SR */
90#define m340_Rx_RDY             1
91#define m340_FFULL              (1<<1)
92#define m340_Tx_RDY             (1<<2)
93#define m340_TxEMP              (1<<3)
94#define m340_OE                 (1<<4)
95#define m340_PE                 (1<<5)
96#define m340_FE                 (1<<6)
97#define m340_RB                 (1<<7)
98
99/*  IER */
100#define m340_TxRDYA             1
101#define m340_RxRDYA             (1<<1)
102#define m340_TxRxRDYA           0x3
103#define m340_TxRDYB             (1<<4)
104#define m340_RxRDYB             (1<<5)
105#define m340_TxRxRDYB           0x30
106
107/*  CR */
108#define m340_Reset_Error_Status 0x40
109#define m340_Reset_Receiver     0x20
110#define m340_Reset_Transmitter  0x30
111#define m340_Transmitter_Enable (1<<2)
112#define m340_Receiver_Enable    1
113#define m340_Transmitter_Disable (2<<2)
114#define m340_Receiver_Disable   2
115
116/*  ACR */
117#define m340_BRG_Set1           0
118#define m340_BRG_Set2           (1<<7)
119
120/*  OPCR */
121#define m340_OPCR_Gal           0x0
122#define m340_OPCR_Aux           0xFF
123
124/*  ISR */
125#define m340_COS                (1<<7)
126#define m340_DBB                (1<<6)
127#define m340_XTAL_RDY           (1<<3)
128#define m340_DBA                (1<<2)
129
130/*  MR1 */
131#define m340_RxRTS              (1<<7)
132#define m340_R_F                (1<<6)          /* character or block mode */
133#define m340_ERR                (1<<5)
134#define m340_RxRTX              (1<<7)
135#define m340_Even_Parity        0
136#define m340_Odd_Parity         (1<<2)
137#define m340_Low_Parity         (2<<2)
138#define m340_High_Parity        (3<<2)
139#define m340_No_Parity          (4<<2)
140#define m340_Data_Character     (6<<2)
141#define m340_Address_Character  (7<<2)
142#define m340_5bpc               0x0
143#define m340_6bpc               0x1
144#define m340_7bpc               0x2
145#define m340_8bpc               0x3
146
147/*  MR2 */
148#define m340_normal             (0<<6)
149#define m340_automatic_echo     (1<<6)
150#define m340_local_loopback     (2<<6)
151#define m340_remote_loopback    (3<<6)
152#define m340_TxRTS              (1<<5)
153#define m340_TxCTS              (1<<4)
154
155/* Baud rates for Transmitter/Receiver */
156#define SCLK    1               /* put your own SCLK value here */
157
158#endif
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