source: rtems/c/src/lib/libbsp/m68k/gen68340/include/m340timer.h @ d7aecdc

4.104.114.84.95
Last change on this file since d7aecdc was 08311cc3, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 17, 1999 at 5:51:34 PM

Updated copyright notice.

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/*
2 *  Header file for timer driver
3 *  defines for accessing M68340 timer registers
4 *
5 *  Author:
6 *  Geoffroy Montel
7 *  France Telecom - CNET/DSM/TAM/CAT
8 *  4, rue du Clos Courtel
9 *  35512 CESSON-SEVIGNE
10 *  FRANCE
11 *
12 *  e-mail: g_montel@yahoo.com
13 *
14 *  COPYRIGHT (c) 1989-1999.
15 *  On-Line Applications Research Corporation (OAR).
16 *
17 *  The license and distribution terms for this file may be
18 *  found in the file LICENSE in this distribution or at
19 *
20 *  http://www.OARcorp.com/rtems/license.html.
21 *
22 *  $Id$
23 */
24
25#ifndef __m340timer_H__
26#define __m340timer_H__
27
28extern void Fifo_Full_Timer_initialize (void);
29
30extern void (*Restart_Fifo_Full_A_Timer)();
31extern void (*Restart_Check_A_Timer)();
32extern void (*Restart_Fifo_Full_B_Timer)();
33extern void (*Restart_Check_B_Timer)();
34
35/*  CR */
36#define m340_SWR                (1<<15)
37#define m340_Polling_Mode       (0<<12)
38#define m340_TC_Enabled         (1<<12)
39#define m340_TG_Enabled         (2<<12)
40#define m340_TG_TC_Enabled      (3<<12)
41#define m340_TO_Enabled         (4<<12)
42#define m340_TO_TC_Enabled      (5<<12)
43#define m340_TG_TG_Enabled      (6<<12)
44#define m340_TO_TG_TG_Enabled   (7<<12)
45#define m340_TGE                (1<<11)
46#define m340_PSE                (1<<10)
47#define m340_CPE                (1<<9)
48#define m340_CLK                (1<<8)
49#define m340_Divide_by_2        (1<<5)
50#define m340_Divide_by_4        (2<<5)
51#define m340_Divide_by_8        (3<<5)
52#define m340_Divide_by_16       (4<<5)
53#define m340_Divide_by_32       (5<<5)
54#define m340_Divide_by_64       (6<<5)
55#define m340_Divide_by_128      (7<<5)
56#define m340_Divide_by_256      (0<<5)
57#define m340_ICOC               (0<<2)
58#define m340_SWG                (1<<2)
59#define m340_VDCSWG             (2<<2)
60#define m340_VWSSPG             (3<<2)
61#define m340_PWM                (4<<2)
62#define m340_PM                 (5<<2)
63#define m340_EC                 (6<<2)
64#define m340_TB                 (7<<2)
65#define m340_Disabled           0
66#define m340_Toggle_Mode        1
67#define m340_Zero_Mode          2
68#define m340_One_Mode           3
69
70/*  SR */
71#define m340_IRQ                (1<<15)
72#define m340_TO                 (1<<14)
73#define m340_TG                 (1<<13)
74#define m340_TC                 (1<<12)
75#define m340_TGL                (1<<11)
76#define m340_ON                 (1<<10)
77#define m340_OUT                (1<<9)
78#define m340_COM                (1<<8)
79
80
81#endif
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