1 | # |
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2 | # $Id$ |
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3 | # |
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4 | |
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5 | BSP NAME: gen68302 |
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6 | BOARD: proprietary (see below for relevant information) |
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7 | BUS: none |
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8 | CPU FAMILY: MC68000 |
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9 | COPROCESSORS: 68302 communications co-processor |
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10 | MODE: not applicable |
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11 | |
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12 | DEBUG MONITOR: none |
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13 | |
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14 | PERIPHERALS |
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15 | =========== |
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16 | TIMERS: two 68302 timers, one 68302 watchdog timer |
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17 | RESOLUTION: ? |
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18 | SERIAL PORTS: three 68302 SCCs |
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19 | REAL-TIME CLOCK: |
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20 | DMA: built-in 68302, not used |
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21 | VIDEO: none |
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22 | SCSI: none |
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23 | NETWORKING: none |
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24 | |
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25 | DRIVER INFORMATION |
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26 | ================== |
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27 | CLOCK DRIVER: 68302 (TIMER1) |
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28 | IOSUPP DRIVER: 68302 SCC2 |
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29 | SHMSUPP: none |
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30 | TIMER DRIVER: 68302 TIMER2 |
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31 | |
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32 | STDIO |
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33 | ===== |
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34 | PORT: ? |
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35 | ELECTRICAL: EIA-232 |
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36 | BAUD: 9600 |
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37 | BITS PER CHARACTER: 8 |
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38 | PARITY: None |
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39 | STOP BITS: 1 |
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40 | |
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41 | NOTES |
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42 | ===== |
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43 | |
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44 | Board description |
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45 | ----------------- |
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46 | clock rate: 16 MHz |
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47 | bus width: 16 bits |
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48 | ROM: 128 kbyte (flash, 0 wait states, chip select 0) |
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49 | RAM: 256 kbyte (static, 0 wait states, chip select 1) |
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50 | |
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51 | The 68302's built-in DRAM refresh controller circuitry is neither used |
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52 | nor configured at startup. |
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53 | |
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54 | Host System |
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55 | ----------- |
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56 | HP 9000/715, HP-UX 9.05 |
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57 | gcc-2.6.3 |
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58 | binutils-2.5.2 |
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59 | |
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60 | |
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61 | Verification |
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62 | ------------ |
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63 | The 1-ms clock ISR rate was verified with an in-circuit emulator. |
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64 | |
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65 | Single processor tests: |
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66 | Multi-processort tests: not applicable |
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67 | Timing tests: see results in c/src/tests/tmtests/times |
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68 | |
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69 | Note: The board has 256 kbyte RAM, so the timing tests would not run |
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70 | with the standard executive RAM size configuration of 256 K. |
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71 | Modifying the conftbl.h files to specify 160 kbyte for workspace |
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72 | seemed to work. |
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73 | |
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74 | * Porting |
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75 | |
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76 | ** Mod c/src/tests/tmtests/*/conftbl.h |
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77 | |
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78 | Modified to use 160 kbyte for executive RAM size. |
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79 | |
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80 | ** Add c/make/custom/gen68302.cfg |
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81 | |
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82 | Based on m68k_no_bsp.cfg. Turned off multiprocessor support. Had to |
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83 | use a BSP-specific compiler configuration file in order to link the |
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84 | proper startup file. |
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85 | |
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86 | ** Mod c/make/compilers/gcc-m68000.cfg |
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87 | |
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88 | Added "-m68000" to the AS macro so that non-68000 instructions are |
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89 | neither generated nor allowed (remember that the GNU assembler |
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90 | supports pseudo-assembler instructions (e.g. jbsr) that will be |
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91 | "intelligently" assembled.) Added "m68000/" before libgcc.a so that |
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92 | non-68000 instructions aren't included. |
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93 | |
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94 | ** Add c/make/compilers/gcc-gen68302.cfg |
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95 | |
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96 | Based on modified gcc-m68000.cfg. |
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97 | |
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98 | Changed make-exe define to produce IEEE-695 output files for loading |
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99 | into the emulator. |
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100 | |
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101 | The board has no debug monitor, so I had to create a 68302-specific |
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102 | startup file (c/src/lib/libbsp/m68k/gen68302/start302/start302.s) to |
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103 | override the c/src/lib/start/m68k/start.s. START_FILE entry was |
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104 | modified to causes start302.s to be linked first (in lieu of start.s). |
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105 | |
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106 | ** Mod c/src/exec/cpu/m68k/cpu.h |
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107 | |
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108 | Turned off software and hardware interrupt stack support. Added |
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109 | support in _CPU_Bitfield_Find_first_bit() and |
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110 | _CPU_Priority_Bits_index() to replace the bfffo instruction. |
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111 | |
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112 | TODO: add software-maintained interrupt stack. |
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113 | |
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114 | TODO: optimize things so that subtracting _priority from 15 isn't |
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115 | required in _CPU_Priority_Bits_index(). |
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116 | |
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117 | ** Mod c/src/exec/cpu/m68k/cpu.c |
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118 | |
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119 | Added the log base 2 table (__log2table) that's required by the BFFFO |
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120 | replacement in cpu.h. |
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121 | |
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122 | ** Mod c/src/exec/cpu/m68k/cpu_asm.s |
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123 | |
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124 | Added _ISR_Exit that's currently used in TBD.... Added ifdef wrapper |
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125 | around ISR exit code that accessed the format nibble. Added some code |
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126 | to restore the status register and call _Thread_Dispatch. |
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127 | |
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128 | TODO: add software-maintained interrupt stack. |
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129 | |
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130 | ** Mod c/src/exec/cpu/m68k/m68k.h |
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131 | |
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132 | Changed "typedef char signed8" to "typedef signed char signed8". |
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133 | |
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134 | ** Add c/src/lib/libbsp/m68k/gen68302/... |
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135 | *** clock/ |
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136 | |
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137 | TODO: Add set_vector support. Figure out what to do with Clock_exit(). |
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138 | TODO: Pre-compute (BSP_Configuration.microseconds_per_tick/1000) so that |
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139 | it doesn't have to be re-computed on each Clock_isr(). |
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140 | |
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141 | *** console/ |
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142 | |
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143 | These files assume SCC2, but it shouldn't be too difficult to re-write |
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144 | these to use any of the other SCCs. |
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145 | |
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146 | *** include/ |
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147 | *** start302/ |
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148 | |
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149 | This contains the start302.s file that does some fairly tricky memory |
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150 | re-mapping so that RAM ends up at 0 and ROM ends up at 0xc00000. |
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151 | |
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152 | *** startup/ |
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153 | *** timer/ |
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154 | *** wrapup/ |
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