1 | /* |
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2 | *------------------------------------------------------------------- |
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3 | * |
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4 | * DP8570A -- header file for National Semiconducor's DP8570A TCP |
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5 | * |
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6 | * This file has been created by John S. Gwynne for the efi68k |
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7 | * project. |
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8 | * |
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9 | * The license and distribution terms for this file may in |
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10 | * the file LICENSE in this distribution or at |
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11 | * http://www.OARcorp.com/rtems/license.html. |
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12 | * |
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13 | *------------------------------------------------------------------ |
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14 | * |
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15 | * $Id$ |
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16 | */ |
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17 | |
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18 | #ifndef _DP8570A_H_ |
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19 | #define _DP8570A_H_ |
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20 | |
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21 | /* base address is the physical location of register 0 */ |
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22 | #define TCP_BASE_ADDRESS 0x0600001 |
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23 | |
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24 | |
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25 | /* definitions of register addresses and associate bits */ |
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26 | |
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27 | /* ********************************************************* */ |
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28 | /* Control Registers */ |
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29 | /* ********************************************************* */ |
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30 | |
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31 | /* REMEMBER: if you are in an interrupt routine, you must |
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32 | reset RS and PS of MSR to the value they had on entry |
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33 | to the ISR before exiting */ |
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34 | |
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35 | #define MSR (volatile unsigned char * const)(0x00*2+TCP_BASE_ADDRESS) |
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36 | /* Main Status Register */ |
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37 | #define INT 0x01 /* Interrupt Status */ |
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38 | #define PF 0x02 /* Power Fail Interrupt */ |
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39 | #define PER 0x04 /* Period Interrupt */ |
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40 | #define AL 0x08 /* Alarm Interrupt */ |
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41 | #define T0 0x10 /* Timer 0 Interrupt */ |
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42 | #define T1 0x20 /* Timer 1 Interrupt */ |
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43 | #define RS 0x40 /* Register Select Bit */ |
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44 | #define PS 0x80 /* Page Select Bit */ |
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45 | |
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46 | #define T0CR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS) |
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47 | /* Timer 0 Control Register */ |
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48 | #define T1CR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS) |
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49 | /* Timer 1 Control Register */ |
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50 | #define TSS 0x01 /* Timer Start/!Stop */ |
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51 | #define M0 0x02 /* Mode Select */ |
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52 | #define M1 0x04 /* Mode Select */ |
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53 | #define C0 0x08 /* Input Clock Select */ |
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54 | #define C1 0x10 /* Input Clock Select */ |
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55 | #define C2 0x20 /* Input Clock Select */ |
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56 | #define RD 0x40 /* Timer Read */ |
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57 | #define CHG 0x80 /* Count Hold/Gate */ |
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58 | |
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59 | #define PFR (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS) |
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60 | /* Periodic Flag Register */ |
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61 | #define R_1MIN 0x01 /* Minute Flage */ |
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62 | #define R_10S 0x02 /* 10 Second Flag */ |
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63 | #define R_1S 0x04 /* Second Flag */ |
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64 | #define R_100MS 0x08 /* 100 Millisec Flag */ |
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65 | #define R_10MS 0x10 /* 10 Millisec Flag */ |
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66 | #define R_1MS 0x20 /* 1 Millisec Flag */ |
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67 | #define OSF 0x40 /* Oscillator Failed/Single Supply */ |
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68 | #define TMODE 0x80 /* Test Mode Enable */ |
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69 | |
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70 | #define IRR (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS) |
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71 | /* Interrupt Routing Register */ |
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72 | #define PF_R 0x01 /* Power Fail Route */ |
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73 | #define PR_R 0x02 /* Periodic Route */ |
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74 | #define AL_R 0x04 /* Alarm Route */ |
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75 | #define T0_R 0x08 /* Timer 0 Route */ |
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76 | #define T1_R 0x10 /* Timer 1 Route */ |
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77 | #define PFD 0x20 /* PF Delay Enable */ |
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78 | #define LBF 0x40 /* Low Battery Flag */ |
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79 | #define TMSE 0x80 /* Time Save Enable */ |
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80 | |
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81 | #define RTMR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS) |
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82 | /* Real Time Mode Register */ |
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83 | #define LY0 0x01 /* Leap Year LSB */ |
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84 | #define LY1 0x02 /* Leap Year MSB */ |
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85 | #define H12 0x04 /* 12/!24 Hour Mode */ |
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86 | #define CSS 0x08 /* Clock Start/!Stop */ |
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87 | #define IPF 0x10 /* Interrupt PF Operation */ |
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88 | #define TPF 0x20 /* Timer PF Operation */ |
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89 | #define XT0 0x40 /* Crystal Frequency LSB */ |
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90 | #define XT1 0x80 /* Crystal Frequency MSB */ |
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91 | |
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92 | #define OMR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS) |
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93 | /* Output Mode Register */ |
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94 | #define TH 0x01 /* T1 Active Hi/!Low */ |
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95 | #define TP 0x02 /* T1 Push Pull/!Open Drain */ |
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96 | #define IH 0x04 /* INTR Active Hi/!Low */ |
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97 | #define IP 0x08 /* INTR Push Pull/!Open Drain */ |
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98 | #define MH 0x10 /* MFO Active Hi/!Low */ |
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99 | #define MP 0x20 /* MFO Push Pull/!Open Drain */ |
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100 | #define MT 0x40 /* MFO Pin as Timer 0 */ |
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101 | #define MO 0x80 /* MFO Pin as Oscillator */ |
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102 | |
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103 | #define ICR0 (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS) |
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104 | /* Interrupt control Register 0 */ |
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105 | #define ME 0x01 /* Minutes Enable */ |
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106 | #define TSE 0x02 /* 10 Second Enable */ |
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107 | #define SE 0x04 /* Seconds Enable */ |
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108 | #define HME 0x08 /* 100 Millisec Enable */ |
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109 | #define TME 0x10 /* 10 Millisec Enable */ |
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110 | #define OME 0x20 /* Millisec Enable */ |
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111 | #define T0E 0x40 /* Timer 0 Enable */ |
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112 | #define T1E 0x80 /* Timer 1 Enable */ |
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113 | |
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114 | #define ICR1 (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS) |
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115 | /* Interrupt control Register 1 */ |
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116 | #define SCE 0x01 /* Second Compare Enable */ |
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117 | #define MNE 0x02 /* Minute Compare Enable */ |
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118 | #define HRE 0x04 /* Hour Compare Enable */ |
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119 | #define DOME 0x08 /* Day of Month Compare Enable */ |
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120 | #define MOE 0x10 /* Month Compare Enable */ |
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121 | #define DOWE 0x20 /* Day of Week Compare Enable */ |
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122 | #define ALE 0x40 /* Alarm Interrupt Enable */ |
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123 | #define PFE 0x80 /* Power Fail Interrupt Enable */ |
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124 | |
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125 | |
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126 | |
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127 | /* ********************************************************* */ |
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128 | /* Counters: Clock and Calendar (data is stored in BCD) */ |
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129 | /* ********************************************************* */ |
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130 | #define HOFS (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS) |
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131 | /* Hundredth of Seconds */ |
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132 | #define SEC (volatile unsigned char * const)(0x06*2+TCP_BASE_ADDRESS) |
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133 | /* Seconds */ |
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134 | #define MIN (volatile unsigned char * const)(0x07*2+TCP_BASE_ADDRESS) |
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135 | /* Minutes */ |
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136 | #define HRS (volatile unsigned char * const)(0x08*2+TCP_BASE_ADDRESS) |
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137 | /* Hours */ |
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138 | #define DOM (volatile unsigned char * const)(0x09*2+TCP_BASE_ADDRESS) |
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139 | /* Day of Month */ |
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140 | #define MON (volatile unsigned char * const)(0x0a*2+TCP_BASE_ADDRESS) |
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141 | /* Month */ |
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142 | #define YR (volatile unsigned char * const)(0x0b*2+TCP_BASE_ADDRESS) |
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143 | /* Year */ |
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144 | #define JD_LSB (volatile unsigned char * const)(0x0c*2+TCP_BASE_ADDRESS) |
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145 | /* Julian Date (LSB) */ |
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146 | #define JD_MSM (volatile unsigned char * const)(0x0d*2+TCP_BASE_ADDRESS) |
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147 | /* Julian Date (MSB) */ |
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148 | #define DOW (volatile unsigned char * const)(0x0e*2+TCP_BASE_ADDRESS) |
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149 | /* Day of week */ |
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150 | |
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151 | |
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152 | /* ********************************************************* */ |
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153 | /* Timer Data Registers */ |
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154 | /* ********************************************************* */ |
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155 | #define T0_LSB (volatile unsigned char * const)(0x0f*2+TCP_BASE_ADDRESS) |
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156 | /* Timer 0 LSB */ |
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157 | #define T0_MSB (volatile unsigned char * const)(0x10*2+TCP_BASE_ADDRESS) |
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158 | /* Timer 0 MSB */ |
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159 | #define T1_LSB (volatile unsigned char * const)(0x11*2+TCP_BASE_ADDRESS) |
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160 | /* Timer 1 LSB */ |
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161 | #define T1_MSB (volatile unsigned char * const)(0x12*2+TCP_BASE_ADDRESS) |
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162 | /* Timer 1 MSB */ |
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163 | |
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164 | |
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165 | /* ********************************************************* */ |
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166 | /* Timer Compare RAM */ |
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167 | /* ********************************************************* */ |
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168 | #define TC_SEC (volatile unsigned char * const)(0x13*2+TCP_BASE_ADDRESS) |
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169 | /* Seconds Compare RAM */ |
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170 | #define TC_MIN (volatile unsigned char * const)(0x14*2+TCP_BASE_ADDRESS) |
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171 | /* Minutes Compare RAM */ |
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172 | #define TC_HRS (volatile unsigned char * const)(0x15*2+TCP_BASE_ADDRESS) |
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173 | /* Hours Compare RAM */ |
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174 | #define TC_DOM (volatile unsigned char * const)(0x16*2+TCP_BASE_ADDRESS) |
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175 | /* Day of Month Compare RAM */ |
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176 | #define TC_MON (volatile unsigned char * const)(0x17*2+TCP_BASE_ADDRESS) |
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177 | /* Month Compare RAM */ |
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178 | #define TC_DOW (volatile unsigned char * const)(0x18*2+TCP_BASE_ADDRESS) |
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179 | /* Day of Week Compare RAM */ |
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180 | |
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181 | |
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182 | /* ********************************************************* */ |
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183 | /* Time Save RAM */ |
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184 | /* ********************************************************* */ |
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185 | #define S_SEC (volatile unsigned char * const)(0x19*2+TCP_BASE_ADDRESS) |
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186 | /* Seconds Save RAM */ |
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187 | #define S_MIN (volatile unsigned char * const)(0x1a*2+TCP_BASE_ADDRESS) |
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188 | /* Minutes Save RAM */ |
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189 | #define S_HRS (volatile unsigned char * const)(0x1b*2+TCP_BASE_ADDRESS) |
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190 | /* Hours Save RAM */ |
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191 | #define S_DOM (volatile unsigned char * const)(0x1c*2+TCP_BASE_ADDRESS) |
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192 | /* Day of Month Save RAM */ |
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193 | #define S_MON (volatile unsigned char * const)(0x1d*2+TCP_BASE_ADDRESS) |
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194 | /* Month Save RAM */ |
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195 | |
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196 | |
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197 | /* ********************************************************* */ |
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198 | /* Miscellaneous Registers */ |
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199 | /* ********************************************************* */ |
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200 | /* rem: 0x1e is general purpose RAM */ |
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201 | #define TMR (volatile unsigned char * const)(0x1F*2+TCP_BASE_ADDRESS) |
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202 | /* RAM/Test Mode Register */ |
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203 | |
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204 | |
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205 | |
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206 | /* ********************************************************* */ |
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207 | /* RAM allocation */ |
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208 | /* ********************************************************* */ |
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209 | #define RAM_OSC_FAIL (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS) |
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210 | /* 1: osc. failed time lost */ |
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211 | #define RAM_POWERUP (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS) |
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212 | /* 1: power was removed and the applied |
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213 | before last TCP init */ |
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214 | #define RAM_LOWBAT (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS) |
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215 | /* 1: battery voltage is low (2.2V) */ |
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216 | /* not valid in single supply mode */ |
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217 | #define RAM_SINGLE_SUP (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS) |
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218 | /* 1: single supply mode */ |
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219 | /* note: single supply mode will be |
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220 | selected when no backup battery is |
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221 | present and/or the first time the |
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222 | system is booted after the loss of |
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223 | backup battery voltage. */ |
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224 | #define RAM_TCP_FAILURE (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS) |
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225 | /* 1: TCP failed to start oscillating */ |
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226 | |
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227 | |
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228 | /* ********************************************************* */ |
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229 | /* TCP data structures */ |
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230 | /* ********************************************************* */ |
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231 | |
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232 | struct clock_counters { |
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233 | unsigned char hofs; |
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234 | unsigned char d0; /* the dx's are place holders since */ |
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235 | unsigned char sec; /* the TCP is addressable only on */ |
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236 | unsigned char d1; /* odd addresses. */ |
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237 | unsigned char min; |
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238 | unsigned char d2; |
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239 | unsigned char hrs; |
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240 | unsigned char d3; |
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241 | unsigned char dom; |
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242 | unsigned char d4; |
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243 | unsigned char mon; |
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244 | unsigned char d5; |
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245 | unsigned char yr; |
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246 | unsigned char d6; |
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247 | unsigned char jd0; |
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248 | unsigned char d7; |
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249 | unsigned char jd1; |
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250 | unsigned char d8; |
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251 | unsigned char dow; |
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252 | }; |
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253 | |
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254 | extern struct clock_ram * const tcp_power_up; |
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255 | |
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256 | struct clock_ram { |
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257 | unsigned char sec; |
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258 | unsigned char d0; /* the dx's are place holders since */ |
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259 | unsigned char min; /* the TCP is addressable only on */ |
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260 | unsigned char d1; /* odd addresses. */ |
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261 | unsigned char hrs; |
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262 | unsigned char d2; |
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263 | unsigned char dom; |
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264 | unsigned char d3; |
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265 | unsigned char mon; |
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266 | }; |
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267 | |
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268 | extern struct clock_ram * const tcp_power_up; |
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269 | extern struct clock_ram * const tcp_power_down; |
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270 | extern struct clock_counters * const tcp_clock; |
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271 | extern struct clock_ram * const tcp_save_ram; |
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272 | |
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273 | void tcp_init(void); |
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274 | |
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275 | #endif /* _DP8570A_H_ */ |
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