source: rtems/c/src/lib/libbsp/m68k/efi68k/include/DP8570A.h @ 5ed08967

4.104.114.84.95
Last change on this file since 5ed08967 was 18647b7, checked in by Joel Sherrill <joel.sherrill@…>, on 04/25/97 at 16:58:10

updated to reflect new license per John Gwynne's permission.
  • Property mode set to 100644
File size: 10.5 KB
Line 
1/*
2 *-------------------------------------------------------------------
3 *
4 *   DP8570A -- header file for National Semiconducor's DP8570A TCP
5 *
6 * This file has been created by John S. Gwynne for the efi68k
7 * project.
8 *
9 *  The license and distribution terms for this file may in
10 *  the file LICENSE in this distribution or at
11 *  http://www.OARcorp.com/rtems/license.html.
12 *
13 *------------------------------------------------------------------
14 *
15 *  $Id$
16 */
17
18#ifndef _DP8570A_H_
19#define _DP8570A_H_
20
21/* base address is the physical location of register 0 */
22#define TCP_BASE_ADDRESS 0x0600001
23
24
25/* definitions of register addresses and associate bits */
26
27/* ********************************************************* */
28/* Control Registers */
29/* ********************************************************* */
30
31/* REMEMBER: if you are in an interrupt routine, you must
32   reset RS and PS of MSR to the value they had on entry
33   to the ISR before exiting */
34
35#define MSR (volatile unsigned char * const)(0x00*2+TCP_BASE_ADDRESS)
36                                /* Main Status Register */
37#define    INT 0x01             /*    Interrupt Status */
38#define    PF  0x02             /*    Power Fail Interrupt */
39#define    PER 0x04             /*    Period Interrupt */
40#define    AL  0x08             /*    Alarm Interrupt */
41#define    T0  0x10             /*    Timer 0 Interrupt */
42#define    T1  0x20             /*    Timer 1 Interrupt */
43#define    RS  0x40             /*    Register Select Bit */
44#define    PS  0x80             /*    Page Select Bit */
45
46#define T0CR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
47                                /* Timer 0 Control Register */
48#define T1CR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
49                                /* Timer 1 Control Register */
50#define    TSS 0x01             /*    Timer Start/!Stop */
51#define    M0  0x02             /*    Mode Select */
52#define    M1  0x04             /*    Mode Select */
53#define    C0  0x08             /*    Input Clock Select */
54#define    C1  0x10             /*    Input Clock Select */
55#define    C2  0x20             /*    Input Clock Select */
56#define    RD  0x40             /*    Timer Read */
57#define    CHG 0x80             /*    Count Hold/Gate */
58
59#define PFR (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
60                                /* Periodic Flag Register */
61#define    R_1MIN  0x01         /*    Minute Flage */
62#define    R_10S   0x02         /*    10 Second Flag */
63#define    R_1S    0x04         /*    Second Flag */
64#define    R_100MS 0x08         /*    100 Millisec Flag */
65#define    R_10MS  0x10         /*    10 Millisec Flag */
66#define    R_1MS   0x20         /*    1 Millisec Flag */
67#define    OSF     0x40         /*    Oscillator Failed/Single Supply */
68#define    TMODE   0x80         /*    Test Mode Enable */
69
70#define IRR (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
71                                /* Interrupt Routing Register */
72#define    PF_R 0x01            /*    Power Fail Route */
73#define    PR_R 0x02            /*    Periodic Route */
74#define    AL_R 0x04            /*    Alarm Route */
75#define    T0_R 0x08            /*    Timer 0 Route */
76#define    T1_R 0x10            /*    Timer 1 Route */
77#define    PFD  0x20            /*    PF Delay Enable */
78#define    LBF  0x40            /*    Low Battery Flag */
79#define    TMSE 0x80            /*    Time Save Enable */
80
81#define RTMR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
82                                /* Real Time Mode Register */
83#define    LY0 0x01             /*    Leap Year LSB */
84#define    LY1 0x02             /*    Leap Year MSB */
85#define    H12 0x04             /*    12/!24 Hour Mode */
86#define    CSS 0x08             /*    Clock Start/!Stop */
87#define    IPF 0x10             /*    Interrupt PF Operation */
88#define    TPF 0x20             /*    Timer PF Operation */
89#define    XT0 0x40             /*    Crystal Frequency LSB */
90#define    XT1 0x80             /*    Crystal Frequency MSB */
91
92#define OMR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
93                                /* Output Mode Register */
94#define    TH  0x01             /*    T1 Active Hi/!Low */
95#define    TP  0x02             /*    T1 Push Pull/!Open Drain */
96#define    IH  0x04             /*    INTR Active Hi/!Low */
97#define    IP  0x08             /*    INTR Push Pull/!Open Drain */
98#define    MH  0x10             /*    MFO Active Hi/!Low */
99#define    MP  0x20             /*    MFO Push Pull/!Open Drain */
100#define    MT  0x40             /*    MFO Pin as Timer 0 */
101#define    MO  0x80             /*    MFO Pin as Oscillator */
102
103#define ICR0 (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
104                                /* Interrupt control Register 0 */
105#define    ME  0x01             /*    Minutes Enable */
106#define    TSE 0x02             /*    10 Second Enable */
107#define    SE  0x04             /*    Seconds Enable */
108#define    HME 0x08             /*    100 Millisec Enable */
109#define    TME 0x10             /*    10 Millisec Enable */
110#define    OME 0x20             /*    Millisec Enable */
111#define    T0E 0x40             /*    Timer 0 Enable */
112#define    T1E 0x80             /*    Timer 1 Enable */
113
114#define ICR1 (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
115                                /* Interrupt control Register 1 */
116#define    SCE  0x01            /*    Second Compare Enable */
117#define    MNE  0x02            /*    Minute Compare Enable */
118#define    HRE  0x04            /*    Hour Compare Enable */
119#define    DOME 0x08            /*    Day of Month Compare Enable */
120#define    MOE  0x10            /*    Month Compare Enable */
121#define    DOWE 0x20            /*    Day of Week Compare Enable */
122#define    ALE  0x40            /*    Alarm Interrupt Enable */
123#define    PFE  0x80            /*    Power Fail Interrupt Enable */
124
125
126
127/* ********************************************************* */
128/* Counters: Clock and Calendar (data is stored in BCD) */
129/* ********************************************************* */
130#define HOFS (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS)
131                                /* Hundredth of Seconds */
132#define SEC (volatile unsigned char * const)(0x06*2+TCP_BASE_ADDRESS)
133                                /* Seconds */
134#define MIN (volatile unsigned char * const)(0x07*2+TCP_BASE_ADDRESS)
135                                /* Minutes */
136#define HRS (volatile unsigned char * const)(0x08*2+TCP_BASE_ADDRESS)
137                                /* Hours */
138#define DOM (volatile unsigned char * const)(0x09*2+TCP_BASE_ADDRESS)
139                                /* Day of Month */
140#define MON (volatile unsigned char * const)(0x0a*2+TCP_BASE_ADDRESS)
141                                /* Month */
142#define YR (volatile unsigned char * const)(0x0b*2+TCP_BASE_ADDRESS)
143                                /* Year */
144#define JD_LSB (volatile unsigned char * const)(0x0c*2+TCP_BASE_ADDRESS)
145                                /* Julian Date (LSB) */
146#define JD_MSM (volatile unsigned char * const)(0x0d*2+TCP_BASE_ADDRESS)
147                                /* Julian Date (MSB) */
148#define DOW (volatile unsigned char * const)(0x0e*2+TCP_BASE_ADDRESS)
149                                /* Day of week */
150
151
152/* ********************************************************* */
153/* Timer Data Registers */
154/* ********************************************************* */
155#define T0_LSB (volatile unsigned char * const)(0x0f*2+TCP_BASE_ADDRESS)
156                                /* Timer 0 LSB */
157#define T0_MSB (volatile unsigned char * const)(0x10*2+TCP_BASE_ADDRESS)
158                                /* Timer 0 MSB */
159#define T1_LSB (volatile unsigned char * const)(0x11*2+TCP_BASE_ADDRESS)
160                                /* Timer 1 LSB */
161#define T1_MSB (volatile unsigned char * const)(0x12*2+TCP_BASE_ADDRESS)
162                                /* Timer 1 MSB */
163
164
165/* ********************************************************* */
166/* Timer Compare RAM */
167/* ********************************************************* */
168#define TC_SEC (volatile unsigned char * const)(0x13*2+TCP_BASE_ADDRESS)
169                                /* Seconds Compare RAM */
170#define TC_MIN (volatile unsigned char * const)(0x14*2+TCP_BASE_ADDRESS)
171                                /* Minutes Compare RAM */
172#define TC_HRS (volatile unsigned char * const)(0x15*2+TCP_BASE_ADDRESS)
173                                /* Hours Compare RAM */
174#define TC_DOM (volatile unsigned char * const)(0x16*2+TCP_BASE_ADDRESS)
175                                /* Day of Month Compare RAM */
176#define TC_MON (volatile unsigned char * const)(0x17*2+TCP_BASE_ADDRESS)
177                                /* Month Compare RAM */
178#define TC_DOW (volatile unsigned char * const)(0x18*2+TCP_BASE_ADDRESS)
179                                /* Day of Week Compare RAM */
180
181
182/* ********************************************************* */
183/* Time Save RAM */
184/* ********************************************************* */
185#define S_SEC (volatile unsigned char * const)(0x19*2+TCP_BASE_ADDRESS)
186                                /* Seconds Save RAM */
187#define S_MIN (volatile unsigned char * const)(0x1a*2+TCP_BASE_ADDRESS)
188                                /* Minutes Save RAM */
189#define S_HRS (volatile unsigned char * const)(0x1b*2+TCP_BASE_ADDRESS)
190                                /* Hours Save RAM */
191#define S_DOM (volatile unsigned char * const)(0x1c*2+TCP_BASE_ADDRESS)
192                                /* Day of Month Save RAM */
193#define S_MON (volatile unsigned char * const)(0x1d*2+TCP_BASE_ADDRESS)
194                                /* Month Save RAM */
195
196
197/* ********************************************************* */
198/* Miscellaneous Registers */
199/* ********************************************************* */
200                                /* rem: 0x1e is general purpose RAM */
201#define TMR (volatile unsigned char * const)(0x1F*2+TCP_BASE_ADDRESS)
202                                /* RAM/Test Mode Register */
203
204
205
206/* ********************************************************* */
207/* RAM allocation */
208/* ********************************************************* */
209#define RAM_OSC_FAIL (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
210                                /* 1: osc. failed time lost */
211#define RAM_POWERUP (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
212                                /* 1: power was removed and the applied
213                                      before last TCP init */
214#define RAM_LOWBAT (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
215                                /* 1: battery voltage is low (2.2V) */
216                                /* not valid in single supply mode */
217#define RAM_SINGLE_SUP (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
218                                /* 1: single supply mode */
219                                /* note: single supply mode will be
220                                   selected when no backup battery is
221                                   present and/or the first time the
222                                   system is booted after the loss of
223                                   backup battery voltage. */
224#define RAM_TCP_FAILURE (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS)
225                                /* 1: TCP failed to start oscillating */
226
227
228/* ********************************************************* */
229/* TCP data structures */
230/* ********************************************************* */
231
232struct clock_counters {
233  unsigned char hofs;
234  unsigned char d0;             /* the dx's are place holders since */
235  unsigned char sec;            /* the TCP is addressable only on */
236  unsigned char d1;             /* odd addresses. */
237  unsigned char min;
238  unsigned char d2;
239  unsigned char hrs;
240  unsigned char d3;
241  unsigned char dom;
242  unsigned char d4;
243  unsigned char mon;
244  unsigned char d5;
245  unsigned char yr;
246  unsigned char d6;
247  unsigned char jd0;
248  unsigned char d7;
249  unsigned char jd1;
250  unsigned char d8;
251  unsigned char dow;
252};
253
254extern struct clock_ram * const tcp_power_up;
255
256struct clock_ram {
257  unsigned char sec;
258  unsigned char d0;             /* the dx's are place holders since */
259  unsigned char min;            /* the TCP is addressable only on */
260  unsigned char d1;             /* odd addresses. */
261  unsigned char hrs;
262  unsigned char d2;
263  unsigned char dom;
264  unsigned char d3;
265  unsigned char mon;
266};
267
268extern struct clock_ram * const tcp_power_up;
269extern struct clock_ram * const tcp_power_down;
270extern struct clock_counters * const tcp_clock;
271extern struct clock_ram * const tcp_save_ram;
272
273void tcp_init(void);
274
275#endif /* _DP8570A_H_ */
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