source: rtems/c/src/lib/libbsp/m68k/efi68k/include/DP8570A.h @ 486c329

4.104.114.84.95
Last change on this file since 486c329 was 486c329, checked in by Joel Sherrill <joel.sherrill@…>, on 09/20/95 at 15:05:19

Actually adding efi bsp's from John Gwynne after forgetting to
commit them.

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File size: 11.0 KB
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[486c329]1/*
2 *-------------------------------------------------------------------
3 *
4 *   DP8570A -- header file for National Semiconducor's DP8570A TCP
5 *
6 * This file has been created by John S. Gwynne for the efi68k
7 * project.
8 *
9 * Redistribution and use in source and binary forms are permitted
10 * provided that the following conditions are met:
11 * 1. Redistribution of source code and documentation must retain
12 *    the above authorship, this list of conditions and the
13 *    following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote
15 *    products derived from this software without specific prior
16 *    written permission.
17 *
18 * This software is provided "AS IS" without warranty of any kind,
19 * either expressed or implied, including, but not limited to, the
20 * implied warranties of merchantability, title and fitness for a
21 * particular purpose.
22 *
23 *------------------------------------------------------------------
24 *
25 *  $Id$
26 */
27
28#ifndef _DP8570A_H_
29#define _DP8570A_H_
30
31/* base address is the physical location of register 0 */
32#define TCP_BASE_ADDRESS 0x0600001
33
34
35/* definitions of register addresses and associate bits */
36
37/* ********************************************************* */
38/* Control Registers */
39/* ********************************************************* */
40
41/* REMEMBER: if you are in an interrupt routine, you must
42   reset RS and PS of MSR to the value they had on entry
43   to the ISR before exiting */
44
45#define MSR (volatile unsigned char * const)(0x00*2+TCP_BASE_ADDRESS)
46                                /* Main Status Register */
47#define    INT 0x01             /*    Interrupt Status */
48#define    PF  0x02             /*    Power Fail Interrupt */
49#define    PER 0x04             /*    Period Interrupt */
50#define    AL  0x08             /*    Alarm Interrupt */
51#define    T0  0x10             /*    Timer 0 Interrupt */
52#define    T1  0x20             /*    Timer 1 Interrupt */
53#define    RS  0x40             /*    Register Select Bit */
54#define    PS  0x80             /*    Page Select Bit */
55
56#define T0CR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
57                                /* Timer 0 Control Register */
58#define T1CR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
59                                /* Timer 1 Control Register */
60#define    TSS 0x01             /*    Timer Start/!Stop */
61#define    M0  0x02             /*    Mode Select */
62#define    M1  0x04             /*    Mode Select */
63#define    C0  0x08             /*    Input Clock Select */
64#define    C1  0x10             /*    Input Clock Select */
65#define    C2  0x20             /*    Input Clock Select */
66#define    RD  0x40             /*    Timer Read */
67#define    CHG 0x80             /*    Count Hold/Gate */
68
69#define PFR (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
70                                /* Periodic Flag Register */
71#define    R_1MIN  0x01         /*    Minute Flage */
72#define    R_10S   0x02         /*    10 Second Flag */
73#define    R_1S    0x04         /*    Second Flag */
74#define    R_100MS 0x08         /*    100 Millisec Flag */
75#define    R_10MS  0x10         /*    10 Millisec Flag */
76#define    R_1MS   0x20         /*    1 Millisec Flag */
77#define    OSF     0x40         /*    Oscillator Failed/Single Supply */
78#define    TMODE   0x80         /*    Test Mode Enable */
79
80#define IRR (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
81                                /* Interrupt Routing Register */
82#define    PF_R 0x01            /*    Power Fail Route */
83#define    PR_R 0x02            /*    Periodic Route */
84#define    AL_R 0x04            /*    Alarm Route */
85#define    T0_R 0x08            /*    Timer 0 Route */
86#define    T1_R 0x10            /*    Timer 1 Route */
87#define    PFD  0x20            /*    PF Delay Enable */
88#define    LBF  0x40            /*    Low Battery Flag */
89#define    TMSE 0x80            /*    Time Save Enable */
90
91#define RTMR (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
92                                /* Real Time Mode Register */
93#define    LY0 0x01             /*    Leap Year LSB */
94#define    LY1 0x02             /*    Leap Year MSB */
95#define    H12 0x04             /*    12/!24 Hour Mode */
96#define    CSS 0x08             /*    Clock Start/!Stop */
97#define    IPF 0x10             /*    Interrupt PF Operation */
98#define    TPF 0x20             /*    Timer PF Operation */
99#define    XT0 0x40             /*    Crystal Frequency LSB */
100#define    XT1 0x80             /*    Crystal Frequency MSB */
101
102#define OMR (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
103                                /* Output Mode Register */
104#define    TH  0x01             /*    T1 Active Hi/!Low */
105#define    TP  0x02             /*    T1 Push Pull/!Open Drain */
106#define    IH  0x04             /*    INTR Active Hi/!Low */
107#define    IP  0x08             /*    INTR Push Pull/!Open Drain */
108#define    MH  0x10             /*    MFO Active Hi/!Low */
109#define    MP  0x20             /*    MFO Push Pull/!Open Drain */
110#define    MT  0x40             /*    MFO Pin as Timer 0 */
111#define    MO  0x80             /*    MFO Pin as Oscillator */
112
113#define ICR0 (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
114                                /* Interrupt control Register 0 */
115#define    ME  0x01             /*    Minutes Enable */
116#define    TSE 0x02             /*    10 Second Enable */
117#define    SE  0x04             /*    Seconds Enable */
118#define    HME 0x08             /*    100 Millisec Enable */
119#define    TME 0x10             /*    10 Millisec Enable */
120#define    OME 0x20             /*    Millisec Enable */
121#define    T0E 0x40             /*    Timer 0 Enable */
122#define    T1E 0x80             /*    Timer 1 Enable */
123
124#define ICR1 (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
125                                /* Interrupt control Register 1 */
126#define    SCE  0x01            /*    Second Compare Enable */
127#define    MNE  0x02            /*    Minute Compare Enable */
128#define    HRE  0x04            /*    Hour Compare Enable */
129#define    DOME 0x08            /*    Day of Month Compare Enable */
130#define    MOE  0x10            /*    Month Compare Enable */
131#define    DOWE 0x20            /*    Day of Week Compare Enable */
132#define    ALE  0x40            /*    Alarm Interrupt Enable */
133#define    PFE  0x80            /*    Power Fail Interrupt Enable */
134
135
136
137/* ********************************************************* */
138/* Counters: Clock and Calendar (data is stored in BCD) */
139/* ********************************************************* */
140#define HOFS (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS)
141                                /* Hundredth of Seconds */
142#define SEC (volatile unsigned char * const)(0x06*2+TCP_BASE_ADDRESS)
143                                /* Seconds */
144#define MIN (volatile unsigned char * const)(0x07*2+TCP_BASE_ADDRESS)
145                                /* Minutes */
146#define HRS (volatile unsigned char * const)(0x08*2+TCP_BASE_ADDRESS)
147                                /* Hours */
148#define DOM (volatile unsigned char * const)(0x09*2+TCP_BASE_ADDRESS)
149                                /* Day of Month */
150#define MON (volatile unsigned char * const)(0x0a*2+TCP_BASE_ADDRESS)
151                                /* Month */
152#define YR (volatile unsigned char * const)(0x0b*2+TCP_BASE_ADDRESS)
153                                /* Year */
154#define JD_LSB (volatile unsigned char * const)(0x0c*2+TCP_BASE_ADDRESS)
155                                /* Julian Date (LSB) */
156#define JD_MSM (volatile unsigned char * const)(0x0d*2+TCP_BASE_ADDRESS)
157                                /* Julian Date (MSB) */
158#define DOW (volatile unsigned char * const)(0x0e*2+TCP_BASE_ADDRESS)
159                                /* Day of week */
160
161
162/* ********************************************************* */
163/* Timer Data Registers */
164/* ********************************************************* */
165#define T0_LSB (volatile unsigned char * const)(0x0f*2+TCP_BASE_ADDRESS)
166                                /* Timer 0 LSB */
167#define T0_MSB (volatile unsigned char * const)(0x10*2+TCP_BASE_ADDRESS)
168                                /* Timer 0 MSB */
169#define T1_LSB (volatile unsigned char * const)(0x11*2+TCP_BASE_ADDRESS)
170                                /* Timer 1 LSB */
171#define T1_MSB (volatile unsigned char * const)(0x12*2+TCP_BASE_ADDRESS)
172                                /* Timer 1 MSB */
173
174
175/* ********************************************************* */
176/* Timer Compare RAM */
177/* ********************************************************* */
178#define TC_SEC (volatile unsigned char * const)(0x13*2+TCP_BASE_ADDRESS)
179                                /* Seconds Compare RAM */
180#define TC_MIN (volatile unsigned char * const)(0x14*2+TCP_BASE_ADDRESS)
181                                /* Minutes Compare RAM */
182#define TC_HRS (volatile unsigned char * const)(0x15*2+TCP_BASE_ADDRESS)
183                                /* Hours Compare RAM */
184#define TC_DOM (volatile unsigned char * const)(0x16*2+TCP_BASE_ADDRESS)
185                                /* Day of Month Compare RAM */
186#define TC_MON (volatile unsigned char * const)(0x17*2+TCP_BASE_ADDRESS)
187                                /* Month Compare RAM */
188#define TC_DOW (volatile unsigned char * const)(0x18*2+TCP_BASE_ADDRESS)
189                                /* Day of Week Compare RAM */
190
191
192/* ********************************************************* */
193/* Time Save RAM */
194/* ********************************************************* */
195#define S_SEC (volatile unsigned char * const)(0x19*2+TCP_BASE_ADDRESS)
196                                /* Seconds Save RAM */
197#define S_MIN (volatile unsigned char * const)(0x1a*2+TCP_BASE_ADDRESS)
198                                /* Minutes Save RAM */
199#define S_HRS (volatile unsigned char * const)(0x1b*2+TCP_BASE_ADDRESS)
200                                /* Hours Save RAM */
201#define S_DOM (volatile unsigned char * const)(0x1c*2+TCP_BASE_ADDRESS)
202                                /* Day of Month Save RAM */
203#define S_MON (volatile unsigned char * const)(0x1d*2+TCP_BASE_ADDRESS)
204                                /* Month Save RAM */
205
206
207/* ********************************************************* */
208/* Miscellaneous Registers */
209/* ********************************************************* */
210                                /* rem: 0x1e is general purpose RAM */
211#define TMR (volatile unsigned char * const)(0x1F*2+TCP_BASE_ADDRESS)
212                                /* RAM/Test Mode Register */
213
214
215
216/* ********************************************************* */
217/* RAM allocation */
218/* ********************************************************* */
219#define RAM_OSC_FAIL (volatile unsigned char * const)(0x01*2+TCP_BASE_ADDRESS)
220                                /* 1: osc. failed time lost */
221#define RAM_POWERUP (volatile unsigned char * const)(0x02*2+TCP_BASE_ADDRESS)
222                                /* 1: power was removed and the applied
223                                      before last TCP init */
224#define RAM_LOWBAT (volatile unsigned char * const)(0x03*2+TCP_BASE_ADDRESS)
225                                /* 1: battery voltage is low (2.2V) */
226                                /* not valid in single supply mode */
227#define RAM_SINGLE_SUP (volatile unsigned char * const)(0x04*2+TCP_BASE_ADDRESS)
228                                /* 1: single supply mode */
229                                /* note: single supply mode will be
230                                   selected when no backup battery is
231                                   present and/or the first time the
232                                   system is booted after the loss of
233                                   backup battery voltage. */
234#define RAM_TCP_FAILURE (volatile unsigned char * const)(0x05*2+TCP_BASE_ADDRESS)
235                                /* 1: TCP failed to start oscillating */
236
237
238/* ********************************************************* */
239/* TCP data structures */
240/* ********************************************************* */
241
242struct clock_counters {
243  unsigned char hofs;
244  unsigned char d0;             /* the dx's are place holders since */
245  unsigned char sec;            /* the TCP is addressable only on */
246  unsigned char d1;             /* odd addresses. */
247  unsigned char min;
248  unsigned char d2;
249  unsigned char hrs;
250  unsigned char d3;
251  unsigned char dom;
252  unsigned char d4;
253  unsigned char mon;
254  unsigned char d5;
255  unsigned char yr;
256  unsigned char d6;
257  unsigned char jd0;
258  unsigned char d7;
259  unsigned char jd1;
260  unsigned char d8;
261  unsigned char dow;
262};
263
264extern struct clock_ram * const tcp_power_up;
265
266struct clock_ram {
267  unsigned char sec;
268  unsigned char d0;             /* the dx's are place holders since */
269  unsigned char min;            /* the TCP is addressable only on */
270  unsigned char d1;             /* odd addresses. */
271  unsigned char hrs;
272  unsigned char d2;
273  unsigned char dom;
274  unsigned char d3;
275  unsigned char mon;
276};
277
278extern struct clock_ram * const tcp_power_up;
279extern struct clock_ram * const tcp_power_down;
280extern struct clock_counters * const tcp_clock;
281extern struct clock_ram * const tcp_save_ram;
282
283void tcp_init(void);
284
285#endif /* _DP8570A_H_ */
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