[486c329] | 1 | /* |
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| 2 | * This file contains the efi68k console IO package. |
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| 3 | * |
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[03f2154e] | 4 | * COPYRIGHT (c) 1989-1997. |
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[486c329] | 5 | * On-Line Applications Research Corporation (OAR). |
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[03f2154e] | 6 | * Copyright assigned to U.S. Government, 1994. |
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[486c329] | 7 | * |
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[98e4ebf5] | 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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[03f2154e] | 10 | * http://www.OARcorp.com/rtems/license.html. |
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[486c329] | 11 | * |
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| 12 | * $Id$ |
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| 13 | */ |
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| 14 | |
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| 15 | #include <stdlib.h> |
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| 16 | #include <bsp.h> |
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| 17 | #include <rtems/libio.h> |
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| 18 | |
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| 19 | |
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| 20 | #define BAUD 38400 |
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| 21 | #define CLK_FREQ 8000000.0 |
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| 22 | |
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| 23 | /* BUFFER_LENGTH must be 2^n for n=1, 2, 3, .... */ |
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| 24 | #define BUFFER_LENGTH 256 |
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| 25 | #define RTS_STOP_SIZE BUFFER_LENGTH-64 |
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| 26 | #define RTS_START_SIZE 16 |
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| 27 | |
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| 28 | char xmt_buf[BUFFER_LENGTH]; |
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| 29 | char rcv_buf[BUFFER_LENGTH]; |
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| 30 | /* in: last entry into the buffer; always on a valid character */ |
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| 31 | /* out: points to the next character to be pull from the buffer */ |
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| 32 | /* in+1=out => buffer empty */ |
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| 33 | /* in+2=out => buffer full */ |
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| 34 | struct UART_buf { |
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| 35 | char *offset; |
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| 36 | char *in; |
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| 37 | char *out; |
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| 38 | }; |
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| 39 | static volatile struct UART_buf xmt = { xmt_buf, (char *)0, (char *)1}; |
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| 40 | static volatile struct UART_buf rcv = { rcv_buf, (char *)0, (char *)1}; |
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| 41 | static volatile char _debug_flag = 0; |
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| 42 | static volatile char _tx_stop = 0; |
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| 43 | |
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| 44 | /* _catchUARTint is the interrupt front-end */ |
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| 45 | extern void _catchUARTint(); |
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| 46 | asm(" .text |
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| 47 | .align 2 |
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| 48 | .globl _catchUARTint |
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| 49 | _catchUARTint: |
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| 50 | lea %sp@(4),%sp /* pop return address */ |
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| 51 | moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ |
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| 52 | jbsr uart_interrupt |
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| 53 | moveml %sp@+,%d0-%d7/%a0-%a6 |
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| 54 | rte |
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| 55 | "); |
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| 56 | |
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| 57 | /* _fake_trap_1 will continue the UART interrupt (%sr *still* |
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| 58 | UART_ISR_LEVEL) as a trap #1 to enter the debugger */ |
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| 59 | asm(" .text |
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| 60 | .align 2 |
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| 61 | _fake_trap_1: |
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| 62 | unlk %a6 /* clear interrupt frame */ |
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| 63 | lea %sp@(4),%sp /* remove jbsr instruction */ |
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| 64 | moveml %sp@+,%d0-%d7/%a0-%a6 /* pop registers */ |
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| 65 | jmp (33*6-12+_VBR) /* jump exception 1 */ |
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| 66 | "); |
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| 67 | |
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| 68 | /* dispatch UART interrupt */ |
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| 69 | void xmit_interrupt(void); |
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| 70 | void rcvr_interrupt(void); |
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| 71 | void modem_status(void); |
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| 72 | void _fake_trap_1(void); |
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| 73 | void uart_interrupt(void) { |
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| 74 | register char a; |
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| 75 | |
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| 76 | a=*IIR & (NIP | IID_MASK); /* read interrupt id register */ |
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| 77 | switch (a) { |
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| 78 | case 0x04: case 0x0c: |
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| 79 | rcvr_interrupt(); |
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| 80 | break; |
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| 81 | case 0x02: |
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| 82 | xmit_interrupt(); |
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| 83 | break; |
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| 84 | case 0x00: |
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| 85 | modem_status(); |
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| 86 | break; |
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| 87 | default: |
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| 88 | break; |
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| 89 | } |
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| 90 | if (_debug_flag) { |
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| 91 | _debug_flag = 0; /* reset the flag */ |
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| 92 | _fake_trap_1(); /* fake a trap #1 */ |
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| 93 | } |
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| 94 | } |
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| 95 | |
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| 96 | /* transfer received character to the buffer */ |
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| 97 | void rcvr_interrupt(void) { |
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| 98 | register char *a, c; |
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| 99 | register int length; |
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| 100 | |
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| 101 | while ( (*LSR & DR) != 0) { |
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| 102 | if ((c=*RBR) == 0x1a) /* use ctl-z to reboot */ |
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| 103 | reboot(); |
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| 104 | else if (c == 0x03) { /* use ctl-c to enter debugger */ |
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| 105 | _debug_flag = 1; |
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| 106 | continue; |
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| 107 | } |
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| 108 | *(char *)((int)rcv.offset +(int) |
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| 109 | (a=(char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1)))) = c; |
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| 110 | if ((char *)(((int)rcv.in+2) & ((int)BUFFER_LENGTH-1)) != rcv.out) |
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| 111 | rcv.in=a; |
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| 112 | } |
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| 113 | length = (BUFFER_LENGTH -1) & ( |
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| 114 | ( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out |
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| 115 | + (int)rcv.in + 1); |
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| 116 | if (length >= RTS_STOP_SIZE) |
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| 117 | *MCR &= (char) (~RTS); |
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| 118 | } |
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| 119 | |
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| 120 | /* tranfer buffered characters to the UART */ |
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| 121 | void xmit_interrupt(void) { |
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| 122 | register short int i, oldsr; |
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| 123 | |
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| 124 | _CPU_ISR_Disable( oldsr ); /* for when outbyte calls */ |
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| 125 | if ( (*LSR & THRE) != 0 && _tx_stop == 0 ) |
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| 126 | for (i=0;i<16;i++) { |
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| 127 | if ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1))== xmt.out) |
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| 128 | break; |
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| 129 | *THR=*(char *)((int)xmt.offset+(int)xmt.out); |
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| 130 | xmt.out= (char *)(((int)xmt.out+1) & ((int)BUFFER_LENGTH-1)); |
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| 131 | } |
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| 132 | _CPU_ISR_Enable( oldsr ); |
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| 133 | } |
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| 134 | |
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| 135 | void modem_status(void) { |
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| 136 | register char a; |
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| 137 | |
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| 138 | if ( ((a=*MDSR) & DCTS) != 0 ) |
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| 139 | if ( (a & CTS) == 0) |
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| 140 | _tx_stop = 1; |
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| 141 | else { |
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| 142 | _tx_stop = 0; |
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| 143 | xmit_interrupt(); |
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| 144 | } |
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| 145 | } |
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| 146 | |
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| 147 | /* transfer character from the buffer */ |
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| 148 | char inbyte(void) { |
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| 149 | register char a; |
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| 150 | register int length; |
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| 151 | |
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| 152 | while ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out); |
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| 153 | a=*(char *)((int)rcv.offset+(int)rcv.out); |
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| 154 | rcv.out= (char *)(((int)rcv.out+1) & ((int)BUFFER_LENGTH-1)); |
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| 155 | length = (BUFFER_LENGTH -1) & ( |
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| 156 | ( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out |
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| 157 | + (int)rcv.in + 1); |
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| 158 | if (length < RTS_START_SIZE) |
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| 159 | *MCR |= (char) RTS; |
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| 160 | return (a); |
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| 161 | } |
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| 162 | |
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| 163 | /* once room is avaliable in the buffer, transfer |
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| 164 | the character into the buffer and enable |
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| 165 | the xmtr interrupt */ |
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| 166 | void outbyte(char c) { |
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| 167 | register char *a; |
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| 168 | |
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| 169 | while ((char *)(((int)xmt.in+2) & ((int)BUFFER_LENGTH-1)) == xmt.out); |
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| 170 | *(char *)((int)xmt.offset+(int) |
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| 171 | (a=(char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1))))=c; |
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| 172 | xmt.in=a; |
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| 173 | |
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| 174 | if ( (*LSR & THRE) != 0 ) /* if THRE, uart has already interrupted */ |
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| 175 | xmit_interrupt(); /* and was ignored. Need to restart. */ |
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| 176 | } |
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| 177 | |
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| 178 | void _UART_flush(void) { |
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| 179 | /* loop till xmt buffer empty. Works with interrupts disabled */ |
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| 180 | while ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out) |
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| 181 | xmit_interrupt(); |
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| 182 | /* loop till UART buffer empty */ |
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| 183 | while ( (*LSR & TEMT) == 0 ); |
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| 184 | } |
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| 185 | |
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| 186 | /* console_initialize |
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| 187 | * |
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| 188 | * This routine initializes the console IO driver. |
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| 189 | * |
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| 190 | * Input parameters: NONE |
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| 191 | * |
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| 192 | * Output parameters: NONE |
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| 193 | * |
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| 194 | * Return values: |
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| 195 | */ |
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| 196 | |
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[6335022e] | 197 | void console_init() |
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[486c329] | 198 | { |
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| 199 | /* set clock divisor */ |
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| 200 | *LCR = (char)(DLAB); |
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| 201 | *DLL = (char)((int)(CLK_FREQ/BAUD/16.0+0.5) & 0xFF); |
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| 202 | *DLM = (char)(((int)(CLK_FREQ/BAUD/16.0+0.5) & 0xFF00) >> 8); |
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| 203 | |
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| 204 | /* Line control setup */ |
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| 205 | *LCR = (char)(WL_8 | NSB); |
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| 206 | |
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| 207 | /* Interrupt setup */ |
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| 208 | *IER = (char) 0x0b; /* enable transmit, receive, modem stat int */ |
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| 209 | |
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| 210 | /* FIFO setup */ |
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| 211 | *FCR = (char)(FIFO_E | 0xc0); |
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| 212 | |
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| 213 | /* Modem control setup */ |
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| 214 | *MCR = (char) RTS; |
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| 215 | |
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| 216 | /* init tx_stop with CTS */ |
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| 217 | _tx_stop = ( (*MDSR & CTS) ? 0 : 1); |
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| 218 | |
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| 219 | set_vector(_catchUARTint, UART_ISR_LEVEL+24, 0); |
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[6335022e] | 220 | } |
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| 221 | |
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| 222 | rtems_device_driver console_initialize( |
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| 223 | rtems_device_major_number major, |
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| 224 | rtems_device_minor_number minor, |
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| 225 | void *arg |
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| 226 | ) |
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| 227 | { |
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| 228 | rtems_status_code status; |
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[486c329] | 229 | |
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| 230 | status = rtems_io_register_name( |
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| 231 | "/dev/console", |
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| 232 | major, |
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| 233 | (rtems_device_minor_number) 0 |
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| 234 | ); |
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| 235 | |
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| 236 | if (status != RTEMS_SUCCESSFUL) |
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| 237 | rtems_fatal_error_occurred(status); |
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| 238 | |
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| 239 | return RTEMS_SUCCESSFUL; |
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| 240 | |
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| 241 | } |
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| 242 | |
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| 243 | |
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| 244 | /* is_character_ready |
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| 245 | * |
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| 246 | * This routine returns TRUE if a character is available. |
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| 247 | * |
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| 248 | * Input parameters: NONE |
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| 249 | * |
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| 250 | * Output parameters: NONE |
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| 251 | * |
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| 252 | * Return values: |
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| 253 | */ |
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| 254 | |
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| 255 | rtems_boolean is_character_ready( |
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| 256 | char *ch |
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| 257 | ) |
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| 258 | { |
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| 259 | if ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out) |
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| 260 | return(FALSE); |
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| 261 | else |
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| 262 | return(TRUE); |
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| 263 | } |
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| 264 | |
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| 265 | /* |
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| 266 | * Open entry point |
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| 267 | */ |
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| 268 | |
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| 269 | rtems_device_driver console_open( |
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| 270 | rtems_device_major_number major, |
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| 271 | rtems_device_minor_number minor, |
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| 272 | void * arg |
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| 273 | ) |
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| 274 | { |
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| 275 | return RTEMS_SUCCESSFUL; |
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| 276 | } |
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| 277 | |
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| 278 | /* |
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| 279 | * Close entry point |
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| 280 | */ |
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| 281 | |
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| 282 | rtems_device_driver console_close( |
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| 283 | rtems_device_major_number major, |
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| 284 | rtems_device_minor_number minor, |
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| 285 | void * arg |
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| 286 | ) |
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| 287 | { |
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| 288 | return RTEMS_SUCCESSFUL; |
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| 289 | } |
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| 290 | |
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| 291 | /* |
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| 292 | * read bytes from the serial port. We only have stdin. |
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| 293 | */ |
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| 294 | |
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| 295 | rtems_device_driver console_read( |
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| 296 | rtems_device_major_number major, |
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| 297 | rtems_device_minor_number minor, |
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| 298 | void * arg |
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| 299 | ) |
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| 300 | { |
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| 301 | rtems_libio_rw_args_t *rw_args; |
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| 302 | char *buffer; |
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| 303 | int maximum; |
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| 304 | int count = 0; |
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| 305 | |
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| 306 | rw_args = (rtems_libio_rw_args_t *) arg; |
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| 307 | |
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| 308 | buffer = rw_args->buffer; |
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| 309 | maximum = rw_args->count; |
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| 310 | |
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| 311 | for (count = 0; count < maximum; count++) { |
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| 312 | buffer[ count ] = inbyte(); |
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| 313 | if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { |
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| 314 | buffer[ count++ ] = '\n'; |
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| 315 | break; |
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| 316 | } |
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| 317 | } |
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| 318 | |
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| 319 | rw_args->bytes_moved = count; |
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| 320 | return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; |
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| 321 | } |
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| 322 | |
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| 323 | /* |
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| 324 | * write bytes to the serial port. Stdout and stderr are the same. |
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| 325 | */ |
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| 326 | |
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| 327 | rtems_device_driver console_write( |
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| 328 | rtems_device_major_number major, |
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| 329 | rtems_device_minor_number minor, |
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| 330 | void * arg |
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| 331 | ) |
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| 332 | { |
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| 333 | int count; |
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| 334 | int maximum; |
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| 335 | rtems_libio_rw_args_t *rw_args; |
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| 336 | char *buffer; |
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| 337 | |
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| 338 | rw_args = (rtems_libio_rw_args_t *) arg; |
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| 339 | |
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| 340 | buffer = rw_args->buffer; |
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| 341 | maximum = rw_args->count; |
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| 342 | |
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| 343 | for (count = 0; count < maximum; count++) { |
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| 344 | if ( buffer[ count ] == '\n') { |
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| 345 | outbyte('\r'); |
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| 346 | } |
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| 347 | outbyte( buffer[ count ] ); |
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| 348 | } |
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| 349 | |
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| 350 | rw_args->bytes_moved = maximum; |
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| 351 | return 0; |
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| 352 | } |
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| 353 | |
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| 354 | /* |
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| 355 | * IO Control entry point |
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| 356 | */ |
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| 357 | |
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| 358 | rtems_device_driver console_control( |
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| 359 | rtems_device_major_number major, |
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| 360 | rtems_device_minor_number minor, |
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| 361 | void * arg |
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| 362 | ) |
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| 363 | { |
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| 364 | return RTEMS_SUCCESSFUL; |
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| 365 | } |
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