1 | # |
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2 | # $Id$ |
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3 | # |
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4 | |
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5 | Description: efi68k |
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6 | ============ |
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7 | CPU: MC68HC000 @16MHz |
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8 | RAM: 256k |
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9 | ROM: 256k |
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10 | |
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11 | Based upon a 16MHz 68HC000, efi332 is a minimally configured 4x6 |
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12 | inch single board computer. It includes the following major |
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13 | components: (a) 256k SRAM (km681000l), (b) 256 EPROM (27C010), |
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14 | (c) DP8570A (clock/timer/calendar), (d) MAX791 (cpu supervisory chip |
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15 | with battery backup switch-over and watch dog timer), and |
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16 | (e) NS16550DN (UART). The following interrupt functions have also been |
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17 | incorporated: UART, TIMER, Watch Dog, and Low Line voltage (trips at |
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18 | 4.85V; enough time to save the cpu reg before reset is asserted on |
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19 | power down). |
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20 | The schematic for efi68k is freely available via e-mail. Send |
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21 | "index diy_efi" to majordomo@coulomb.eng.ohio-state.edu. Retrieve the |
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22 | files related to 68hc000-1.00 with the "get diy_efi <filename>" |
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23 | command. efi68k does not have an available printed circuit board, but |
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24 | can be wire-wrapped in about four days. Cost is about $100US. |
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25 | |
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26 | TODO: |
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27 | ===== |
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28 | - add the "tm27 vector" ... can we use a trap instruction? |
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29 | - generate include/coverhd.c to perform the tmtest. |
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30 | - the interrupt drive I/O should be integrated into the RTEMS. |
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31 | - finish the ROM memory model. |
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32 | - add separate interrupt stack (low priority). |
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33 | |
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34 | John S Gwynne |
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35 | Gwynne.1@osu.edu |
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36 | _______________________________________________________________________________ |
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37 | T h e O h i o - S t a t e U n i v e r s i t y |
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38 | ElectroScience Laboratory, 1320 Kinnear Road, Columbus, Ohio 43212, USA |
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39 | Telephone: (614) 292-7981 * Fax: (614) 292-7297 |
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40 | ------------------------------------------------------------------------------- |
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41 | |
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