source: rtems/c/src/lib/libbsp/m68k/efi332/start332/start332.c @ d0e126a6

4.104.114.84.95
Last change on this file since d0e126a6 was d0e126a6, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 11, 1997 at 3:53:05 PM

updates from John Gwynne

  • Property mode set to 100644
File size: 5.7 KB
Line 
1#include <efi332.h>
2#include <sim.h>
3#define __START_C__
4#include "bsp.h"
5
6m68k_isr_entry M68Kvec[256];
7m68k_isr_entry vectors[256];
8char * const __argv[]= {"main", ""};
9char * const __env[]= {""};
10
11int main(const int argc, char * const argv[], char * const env[]);
12
13void dumby_start ()  __attribute__ ((noreturn));
14void  dumby_start() {
15
16  /* We need to by-pass the link instruction since the RAM chip-
17     select pins are not yet configured. */
18  asm volatile ( ".global start ;
19                  start:");
20
21  /* disable interrupts, load stack pointer */
22  asm volatile ( "oriw  #0x0700, %sr;
23                  moveal #M68Kvec, %a0;
24                  movec %a0, %vbr;
25                  movel  #_end, %d0;
26                  addl   " STACK_SIZE ",%d0;
27                  movel  %d0,%sp;
28                  link %a6, #0"
29                  );
30
31  /* include in ram_init.S */
32  /*
33   * Initalize the SIM module.
34   * The stack pointer is not usable until the RAM chip select lines
35   * are configured. The following code must remain inline.
36   */
37
38  /* Module Configuration Register */
39  /*    see section(s) 3.1.3-3.1.6 of the SIM Reference Manual */
40  *SIMCR = (unsigned short int) 
41    (FRZSW | FRZBM | SAM(0,8,SHEN) | (MM*SIM_MM) | SAM(SIM_IARB,0,IARB));
42
43  /* Synthesizer Control Register */
44  /*    see section(s) 4.8 */
45  /* end include in ram_init.S */
46  *SYNCR = (unsigned short int)
47    ( SAM(EFI_W,15,W) | SAM(0x0,14,X) | SAM(EFI_Y,8,Y) | STSIM );
48  while (! (*SYNCR & SLOCK));   /* protect from clock overshoot */
49  /* include in ram_init.S */
50  *SYNCR = (unsigned short int)
51    ( SAM(EFI_W,15,W) | SAM(EFI_X,14,X) | SAM(EFI_Y,8,Y) | STSIM );
52
53  /* System Protection Control Register */
54  /*    !!! can only write to once after reset !!! */
55  /*    see section 3.8.4 of the SIM Reference Manual */
56  *SYPCR = (unsigned char)( SAM(0x3,4,SWT) | HME | BME );
57
58  /* Periodic Interrupr Control Register */
59  /*    see section 3.8.2 of the SIM Reference Manual */
60  *PICR = (unsigned short int)
61    ( SAM(0,8,PIRQL) | SAM(EFI_PIV,0,PIV) );
62  /*     ^^^ zero disables interrupt, don't enable here or ram_init will
63         be wrong. It's enabled below. */
64
65  /* Periodic Interrupt Timer Register */
66  /*    see section 3.8.3 of the SIM Reference Manual */
67  *PITR = (unsigned short int)( SAM(0x09,0,PITM) );
68  /*    1.098mS interrupt */
69
70  /* Port C Data */
71  /*    load values before enabled */
72  *PORTC = (unsigned char) 0x0;
73
74  /* Chip-Select Base Address Register */
75  /*    see section 7 of the SIM Reference Manual */
76  *CSBARBT = (unsigned short int)
77    (((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
78  *CSBAR0 = (unsigned short int)
79    (((0x000000 >> 8)&0xfff8) | BS_1M );   /* 1M bytes located at 0x0000 */
80  *CSBAR1 = (unsigned short int)
81    (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256k bytes located at 0x80000 */
82  *CSBAR2 = (unsigned short int)
83    (((0x080000 >> 8)&0xfff8) | BS_256K ); /* 256 bytes located at 0x80000 */
84  *CSBAR3 = (unsigned short int)         
85    (0xfff8 | BS_64K);                   /* AVEC interrupts */
86  *CSBAR10 = (unsigned short int)
87    (((0x000000 >> 8)&0xfff8) | BS_512K ); /* 512k bytes located at 0x0000 */
88
89  /* Chip-Select Options Registers */
90  /*    see section 7 of the SIM Reference Manual */
91  *CSORBT = (unsigned short int)
92    ( BothBytes | ReadWrite | SyncAS | WaitStates_13 | UserSupSpace );
93  *CSOR0 = (unsigned short int)
94    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
95  *CSOR1 = (unsigned short int)
96    ( LowerByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
97  *CSOR2 = (unsigned short int)
98    ( UpperByte | ReadWrite | SyncAS | FastTerm | UserSupSpace );
99  *CSOR3 = (unsigned short int)
100    ( BothBytes | ReadWrite | SyncAS | CPUSpace | IPLevel_any | AVEC );
101  *CSOR10 = (unsigned short int)
102    ( BothBytes | ReadOnly | SyncAS | External | UserSupSpace );
103
104  /* Chip Select Pin Assignment Register 0 */
105  /*    see section 7 of the SIM Reference Manual */
106  *CSPAR0 = (unsigned short int)( 
107     SAM(DisOut,CS_5,0x3000) |  /* PC2 */
108     SAM(DisOut,CS_4,0x0c00) |  /* PC1 */
109     SAM(DisOut,CS_3,0x0300) |  /* AVEC (internally) */
110     SAM(CS16bit,CS_2,0x00c0)|  /* RAM UDS */
111     SAM(CS16bit,CS_1,0x0030)|  /* RAM LDS */
112     SAM(CS16bit,CS_0,0x000c)|  /* W/!R */
113     SAM(CS16bit,CSBOOT,0x0003) /* ROM DS */
114     );
115
116  /* Chip Select Pin Assignment Register 1 */
117  /*    see section 7 of the SIM Reference Manual */
118  *CSPAR1 = (unsigned short int)( 
119     SAM(CS16bit,CS_10,0x300)|  /* ECLK */
120     SAM(DisOut,CS_9,0x0c0) |   /* PC6 */
121     SAM(DisOut,CS_8,0x030) |   /* PC5 */
122     SAM(DisOut,CS_7,0x00c) |   /* PC4 */
123     SAM(DisOut,CS_6,0x003)     /* PC3 */
124     );
125
126  /* Port E and F Data Register */
127  /*    see section 9 of the SIM Reference Manual */
128  *PORTE0 = (unsigned char) 0;
129  *PORTF0 = (unsigned char) 0;
130
131  /* Port E and F Data Direction Register */
132  /*    see section 9 of the SIM Reference Manual */
133  *DDRE = (unsigned char) 0xff;
134  *DDRF = (unsigned char) 0xfd;
135 
136  /* Port E and F Pin Assignment Register */
137  /*    see section 9 of the SIM Reference Manual */
138  *PEPAR = (unsigned char) 0;
139  *PFPAR = (unsigned char) 0;
140
141  /* end of SIM initalization code */
142  /* end include in ram_init.S */
143
144
145
146  /*
147   * Initialize RAM by copying the .data section out of ROM (if
148   * needed) and "zero-ing" the .bss section.
149   */
150  {
151    register char *src = _endtext;
152    register char *dst = _sdata;
153
154    if (_copy_data_from_rom)
155      /* ROM has data at end of text; copy it. */
156      while (dst < _edata)
157        *dst++ = *src++;
158   
159    /* Zero bss */
160    for (dst = __bss_start; dst< _end; dst++)
161      *dst = 0;
162  }
163
164  /*
165   * Initalize the board.
166   */
167  Spurious_Initialize();
168  console_init();
169
170  /*
171   * Execute main with arguments argv and environment env
172   */
173  main(1, __argv, __env);
174
175  reboot();
176}
177
178void reboot() {asm("trap #15");}
179
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