1 | /* |
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2 | * This file contains the efi332 console IO package. |
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3 | * |
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4 | * COPYRIGHT (c) 1989-1998. |
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5 | * On-Line Applications Research Corporation (OAR). |
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6 | * Copyright assigned to U.S. Government, 1994. |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.OARcorp.com/rtems/license.html. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #include <stdlib.h> |
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16 | #include <bsp.h> |
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17 | #include <rtems/libio.h> |
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18 | |
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19 | /* BUFFER_LENGTH must be 2^n for n=1, 2, 3, .... */ |
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20 | #define BUFFER_LENGTH 256 |
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21 | #define RTS_STOP_SIZE BUFFER_LENGTH-64 |
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22 | #define RTS_START_SIZE 16 |
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23 | |
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24 | char xmt_buf[BUFFER_LENGTH]; |
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25 | char rcv_buf[BUFFER_LENGTH]; |
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26 | /* in: last entry into the buffer; always on a valid character */ |
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27 | /* out: points to the next character to be pull from the buffer */ |
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28 | /* in+1=out => buffer empty */ |
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29 | /* in+2=out => buffer full */ |
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30 | struct UART_buf { |
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31 | char *offset; |
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32 | char *in; |
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33 | char *out; |
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34 | }; |
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35 | static volatile struct UART_buf xmt = { xmt_buf, (char *)0, (char *)1}; |
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36 | static volatile struct UART_buf rcv = { rcv_buf, (char *)0, (char *)1}; |
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37 | static volatile char _debug_flag = 0; |
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38 | |
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39 | #define SET_RTS(a) {*PORTF0 = (*PORTF0 & ~0x4) | ( (a)? 0 : 0x4); } |
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40 | #define GET_CTS (!(*PORTF0 & 0x2)) |
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41 | |
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42 | /* _catchSCIint, _catchCTSint, and _catchSPURIOUSint are the |
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43 | interrupt front-ends */ |
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44 | extern void _catchSCIint(); |
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45 | asm(" .text |
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46 | .align 2 |
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47 | .globl _catchSCIint |
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48 | _catchSCIint: |
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49 | moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ |
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50 | jbsr uart_interrupt |
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51 | moveml %sp@+,%d0-%d7/%a0-%a6 |
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52 | rte |
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53 | "); |
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54 | |
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55 | extern void _catchCTSint(); |
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56 | asm(" .text |
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57 | .align 2 |
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58 | .globl _catchCTSint |
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59 | _catchCTSint: |
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60 | moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ |
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61 | jbsr cts_interrupt |
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62 | moveml %sp@+,%d0-%d7/%a0-%a6 |
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63 | rte |
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64 | "); |
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65 | |
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66 | extern void _catchSPURIOUSint(); |
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67 | asm(" .text |
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68 | .align 2 |
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69 | .globl _catchSPURIOUSint |
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70 | _catchSPURIOUSint: |
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71 | moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ |
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72 | jbsr spurious_interrupt |
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73 | moveml %sp@+,%d0-%d7/%a0-%a6 |
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74 | rte |
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75 | "); |
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76 | |
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77 | int _spurious_int_counter=0; |
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78 | |
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79 | /* note: cts uses int1. If it "bounces", a spurious interrupt is generated */ |
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80 | void spurious_interrupt(void) { |
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81 | _spurious_int_counter++; /* there should never be alot of these */ |
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82 | } |
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83 | |
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84 | /* _fake_trap_1 will continue the UART interrupt (%sr *still* |
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85 | UART_ISR_LEVEL) as a trap #1 to enter the debugger */ |
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86 | |
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87 | /* *****fix me; this is for 68000 w/jsr ram exception table ******* */ |
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88 | asm(" .text |
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89 | .align 2 |
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90 | _fake_trap_1: |
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91 | unlk %a6 /* clear interrupt frame */ |
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92 | lea %sp@(4),%sp /* remove jbsr instruction */ |
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93 | moveml %sp@+,%d0-%d7/%a0-%a6 /* pop registers */ |
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94 | jmp (33*6-12) /* jump exception 1 */ |
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95 | "); |
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96 | |
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97 | /* dispatch UART interrupt */ |
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98 | void xmit_interrupt(void); |
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99 | void rcvr_interrupt(void); |
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100 | void _fake_trap_1(void); |
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101 | |
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102 | void uart_interrupt(void) { |
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103 | /* receiver status bits are cleared by a SCSR read followed |
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104 | by a SCDR read. transmitter status bits are cleared by |
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105 | a SCSR read followed by a SCDR write. */ |
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106 | if ((*SCSR) & (TDRE | TC)) |
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107 | xmit_interrupt(); |
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108 | |
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109 | if ((*SCSR) & (RDRF)) |
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110 | rcvr_interrupt(); |
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111 | |
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112 | if (_debug_flag) { |
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113 | _debug_flag = 0; /* reset the flag */ |
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114 | _fake_trap_1(); /* fake a trap #1 */ |
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115 | } |
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116 | } |
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117 | |
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118 | /* transfer received character to the buffer */ |
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119 | void rcvr_interrupt(void) { |
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120 | register char *a, c; |
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121 | register int length; |
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122 | |
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123 | while((*SCSR) & (RDRF)) { |
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124 | if ((c=*SCDR) == 0x1a) /* use ctl-z to reboot */ |
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125 | reboot(); |
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126 | /* else if (c == 0x03) { */ /* use ctl-c to enter debugger */ |
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127 | /* _debug_flag = 1; */ |
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128 | /* continue; */ |
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129 | /* } */ |
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130 | |
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131 | *(char *)((int)rcv.offset +(int) |
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132 | (a=(char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1)))) = c; |
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133 | if ((char *)(((int)rcv.in+2) & ((int)BUFFER_LENGTH-1)) != rcv.out) |
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134 | rcv.in=a; |
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135 | }; |
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136 | |
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137 | length = (BUFFER_LENGTH -1) & ( |
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138 | ( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out |
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139 | + (int)rcv.in + 1); |
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140 | if (length >= RTS_STOP_SIZE) |
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141 | SET_RTS(0); |
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142 | } |
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143 | |
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144 | /* tranfer buffered characters to the UART */ |
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145 | void xmit_interrupt(void) { |
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146 | register short int oldsr; |
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147 | |
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148 | _CPU_ISR_Disable( oldsr ); /* for when outbyte or flush calls */ |
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149 | while ((*SCSR) & (TDRE)) { |
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150 | if ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out) |
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151 | /* xmit buffer not empty */ |
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152 | if (GET_CTS) { |
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153 | /* send next char */ |
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154 | *SCDR=*(char *)((int)xmt.offset+(int)xmt.out); |
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155 | xmt.out= (char *)(((int)xmt.out+1) & ((int)BUFFER_LENGTH-1)); |
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156 | *SCCR1 = (*SCCR1 & ~(TIE | TCIE)) | (TIE); |
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157 | } |
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158 | else { |
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159 | /* configue CTS interrupt and shutdown xmit interrupts */ |
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160 | *SCCR1 &= ~(TIE | TCIE); |
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161 | *PFPAR |= 0x2; |
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162 | break; |
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163 | } |
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164 | else { |
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165 | /* xmit buffer empty; shutdown interrupts */ |
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166 | *SCCR1 &= ~(TIE | TCIE); |
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167 | break; |
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168 | } |
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169 | } |
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170 | _CPU_ISR_Enable( oldsr ); |
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171 | } |
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172 | |
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173 | void cts_interrupt(void) { |
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174 | register short int oldsr; |
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175 | |
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176 | _CPU_ISR_Disable( oldsr ); /* for when outbyte calls */ |
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177 | |
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178 | *PFPAR &= ~0x2; |
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179 | *SCCR1 = (*SCCR1 & ~(TIE | TCIE)) | (TIE); |
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180 | |
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181 | _CPU_ISR_Enable( oldsr ); |
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182 | } |
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183 | |
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184 | |
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185 | |
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186 | /* transfer character from the buffer */ |
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187 | char inbyte(void) { |
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188 | register char a; |
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189 | register int length; |
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190 | |
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191 | while ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out); |
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192 | a=*(char *)((int)rcv.offset+(int)rcv.out); |
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193 | rcv.out= (char *)(((int)rcv.out+1) & ((int)BUFFER_LENGTH-1)); |
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194 | length = (BUFFER_LENGTH -1) & ( |
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195 | ( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out |
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196 | + (int)rcv.in + 1); |
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197 | if (length < RTS_START_SIZE) |
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198 | SET_RTS(1); |
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199 | return (a); |
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200 | } |
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201 | |
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202 | /* once room is avaliable in the buffer, transfer |
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203 | the character into the buffer and enable |
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204 | the xmtr interrupt */ |
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205 | void outbyte(char c) { |
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206 | register char *a; |
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207 | |
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208 | while ((char *)(((int)xmt.in+2) & ((int)BUFFER_LENGTH-1)) == xmt.out); |
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209 | *(char *)((int)xmt.offset+(int) |
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210 | (a=(char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1))))=c; |
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211 | xmt.in=a; |
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212 | |
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213 | if (!(*SCCR1 & (TIE | TCIE)) && (!(*PFPAR & 0x2)) ) |
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214 | /* if neither interrupts are running, */ |
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215 | xmit_interrupt(); /* we need to restart the xmiter */ |
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216 | } |
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217 | |
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218 | void _UART_flush(void) { |
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219 | /* loop till xmt buffer empty. Works with interrupts disabled */ |
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220 | while ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out) |
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221 | xmit_interrupt(); |
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222 | /* loop till UART buffer empty */ |
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223 | while ( (*SCSR & TC) == 0 ); |
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224 | } |
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225 | |
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226 | /* console_initialize |
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227 | * |
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228 | * This routine initializes the console IO driver. |
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229 | * |
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230 | * Input parameters: NONE |
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231 | * |
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232 | * Output parameters: NONE |
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233 | * |
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234 | * Return values: |
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235 | */ |
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236 | |
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237 | void console_init() |
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238 | { |
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239 | *QSMCR = ( SAM(QSM_IARB,0,IARB) ); |
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240 | *QILR = ( SAM(ISRL_QSPI,4,ILQSPI) | SAM(ISRL_SCI,0,ILSCI) ); |
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241 | *QIVR = ( SAM(EFI_QIVR,0,INTV) ); |
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242 | |
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243 | *SCCR0 = ( (int)( SYS_CLOCK/SCI_BAUD/32.0+0.5 ) & 0x1fff ); |
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244 | *SCCR1 = ( RIE | TE | RE ); |
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245 | |
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246 | set_vector(_catchSPURIOUSint, EFI_SPINT, 0); |
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247 | set_vector(_catchSCIint, EFI_QIVR, 0); |
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248 | set_vector(_catchCTSint, EFI_INT1, 0); |
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249 | } |
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250 | |
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251 | rtems_device_driver console_initialize( |
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252 | rtems_device_major_number major, |
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253 | rtems_device_minor_number minor, |
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254 | void *arg |
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255 | ) |
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256 | { |
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257 | rtems_status_code status; |
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258 | |
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259 | status = rtems_io_register_name( |
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260 | "/dev/console", |
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261 | major, |
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262 | (rtems_device_minor_number) 0 |
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263 | ); |
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264 | |
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265 | if (status != RTEMS_SUCCESSFUL) |
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266 | rtems_fatal_error_occurred(status); |
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267 | |
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268 | return RTEMS_SUCCESSFUL; |
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269 | } |
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270 | |
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271 | /* is_character_ready |
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272 | * |
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273 | * This routine returns TRUE if a character is available. |
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274 | * |
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275 | * Input parameters: NONE |
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276 | * |
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277 | * Output parameters: NONE |
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278 | * |
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279 | * Return values: |
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280 | */ |
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281 | |
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282 | rtems_boolean is_character_ready( |
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283 | char *ch |
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284 | ) |
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285 | { |
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286 | if ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out) |
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287 | return(FALSE); |
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288 | else |
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289 | return(TRUE); |
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290 | } |
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291 | |
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292 | /* |
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293 | * Open entry point |
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294 | */ |
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295 | |
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296 | rtems_device_driver console_open( |
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297 | rtems_device_major_number major, |
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298 | rtems_device_minor_number minor, |
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299 | void * arg |
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300 | ) |
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301 | { |
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302 | return RTEMS_SUCCESSFUL; |
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303 | } |
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304 | |
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305 | /* |
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306 | * Close entry point |
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307 | */ |
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308 | |
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309 | rtems_device_driver console_close( |
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310 | rtems_device_major_number major, |
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311 | rtems_device_minor_number minor, |
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312 | void * arg |
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313 | ) |
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314 | { |
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315 | return RTEMS_SUCCESSFUL; |
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316 | } |
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317 | |
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318 | /* |
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319 | * read bytes from the serial port. We only have stdin. |
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320 | */ |
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321 | |
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322 | rtems_device_driver console_read( |
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323 | rtems_device_major_number major, |
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324 | rtems_device_minor_number minor, |
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325 | void * arg |
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326 | ) |
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327 | { |
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328 | rtems_libio_rw_args_t *rw_args; |
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329 | char *buffer; |
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330 | int maximum; |
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331 | int count = 0; |
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332 | |
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333 | rw_args = (rtems_libio_rw_args_t *) arg; |
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334 | |
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335 | buffer = rw_args->buffer; |
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336 | maximum = rw_args->count; |
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337 | |
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338 | for (count = 0; count < maximum; count++) { |
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339 | buffer[ count ] = inbyte(); |
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340 | if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { |
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341 | buffer[ count++ ] = '\n'; |
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342 | break; |
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343 | } |
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344 | } |
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345 | |
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346 | rw_args->bytes_moved = count; |
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347 | return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; |
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348 | } |
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349 | |
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350 | /* |
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351 | * write bytes to the serial port. Stdout and stderr are the same. |
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352 | */ |
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353 | |
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354 | rtems_device_driver console_write( |
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355 | rtems_device_major_number major, |
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356 | rtems_device_minor_number minor, |
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357 | void * arg |
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358 | ) |
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359 | { |
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360 | int count; |
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361 | int maximum; |
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362 | rtems_libio_rw_args_t *rw_args; |
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363 | char *buffer; |
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364 | |
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365 | rw_args = (rtems_libio_rw_args_t *) arg; |
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366 | |
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367 | buffer = rw_args->buffer; |
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368 | maximum = rw_args->count; |
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369 | |
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370 | for (count = 0; count < maximum; count++) { |
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371 | if ( buffer[ count ] == '\n') { |
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372 | outbyte('\r'); |
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373 | } |
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374 | outbyte( buffer[ count ] ); |
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375 | } |
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376 | |
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377 | rw_args->bytes_moved = maximum; |
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378 | return 0; |
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379 | } |
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380 | |
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381 | /* |
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382 | * IO Control entry point |
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383 | */ |
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384 | |
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385 | rtems_device_driver console_control( |
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386 | rtems_device_major_number major, |
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387 | rtems_device_minor_number minor, |
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388 | void * arg |
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389 | ) |
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390 | { |
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391 | return RTEMS_SUCCESSFUL; |
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392 | } |
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393 | |
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