[ac7d5ef0] | 1 | /* timer.c |
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| 2 | * |
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| 3 | * NOTE: These routines will not work if the optimizer is enabled |
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| 4 | * for some compilers. The multiple writes to the Z8036 |
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| 5 | * may be optimized away. |
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| 6 | * |
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| 7 | * It is important that the timer start/stop overhead be |
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| 8 | * determined when porting or modifying this code. |
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| 9 | * |
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[03f2154e] | 10 | * COPYRIGHT (c) 1989-1997. |
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[ac7d5ef0] | 11 | * On-Line Applications Research Corporation (OAR). |
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[03f2154e] | 12 | * Copyright assigned to U.S. Government, 1994. |
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[ac7d5ef0] | 13 | * |
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[03f2154e] | 14 | * The license and distribution terms for this file may in |
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| 15 | * the file LICENSE in this distribution or at |
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| 16 | * http://www.OARcorp.com/rtems/license.html. |
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[ac7d5ef0] | 17 | * |
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| 18 | * $Id$ |
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| 19 | */ |
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| 20 | |
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| 21 | |
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| 22 | #include <rtems.h> |
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| 23 | #include <bsp.h> |
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| 24 | |
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| 25 | int Ttimer_val; |
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| 26 | rtems_boolean Timer_driver_Find_average_overhead; |
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| 27 | |
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| 28 | rtems_isr timerisr(); |
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| 29 | |
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| 30 | void Timer_initialize() |
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| 31 | { |
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| 32 | rtems_unsigned8 data; |
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| 33 | |
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| 34 | (void) set_vector( timerisr, TIMER_VECTOR, 0 ); /* install ISR */ |
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| 35 | |
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| 36 | Ttimer_val = 0; /* clear timer ISR count */ |
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| 37 | Z8x36_READ ( TIMER, MASTER_INTR, data ); |
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| 38 | Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); |
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| 39 | |
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| 40 | Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 ); |
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| 41 | Z8x36_READ ( TIMER, MASTER_INTR, data ); |
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| 42 | Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) ); |
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| 43 | Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 ); |
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| 44 | Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 ); |
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| 45 | Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x87 ); |
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| 46 | Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, TIMER_VECTOR ); |
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| 47 | Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 ); |
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| 48 | Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x26 ); |
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| 49 | Z8x36_READ ( TIMER, MASTER_INTR, data ); |
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| 50 | Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 ); |
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| 51 | |
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| 52 | Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 ); |
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| 53 | |
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| 54 | /* |
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| 55 | * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6 |
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| 56 | */ |
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| 57 | |
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| 58 | data = (*(rtems_unsigned8 *)0x0D00000B); |
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| 59 | (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x0F) | 0x60; |
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| 60 | |
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| 61 | } |
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| 62 | |
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| 63 | #define AVG_OVERHEAD 9 /* It typically takes 3.65 microseconds */ |
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| 64 | /* (9 countdowns) to start/stop the timer. */ |
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| 65 | #define LEAST_VALID 10 /* Don't trust a value lower than this */ |
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| 66 | |
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| 67 | int Read_timer() |
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| 68 | { |
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| 69 | rtems_unsigned8 data; |
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| 70 | rtems_unsigned8 msb, lsb; |
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| 71 | rtems_unsigned32 remaining, total; |
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| 72 | |
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| 73 | Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */ |
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| 74 | Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb ); |
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| 75 | Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb ); |
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| 76 | |
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| 77 | remaining = 0x10000 - ((msb << 8) + lsb); |
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| 78 | total = (Ttimer_val * 0x10000) + remaining; |
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| 79 | |
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| 80 | Z8x36_READ ( TIMER, MASTER_INTR, data ); |
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| 81 | Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) ); |
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| 82 | |
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| 83 | /* do not restore old vector */ |
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| 84 | if ( Timer_driver_Find_average_overhead == 1 ) |
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| 85 | return total; /* in countdown units */ |
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| 86 | |
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| 87 | if ( total < LEAST_VALID ) |
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| 88 | return 0; /* below timer resolution */ |
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| 89 | |
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| 90 | /* Clocked at 2.4615 Mhz */ |
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| 91 | |
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| 92 | return (int)(((float)(total-AVG_OVERHEAD)) / 2.4615 * 2.0); |
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| 93 | } |
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| 94 | |
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| 95 | rtems_status_code Empty_function( void ) |
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| 96 | { |
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| 97 | return RTEMS_SUCCESSFUL; |
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| 98 | } |
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| 99 | |
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| 100 | void Set_find_average_overhead( |
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| 101 | rtems_boolean find_flag |
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| 102 | ) |
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| 103 | { |
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| 104 | Timer_driver_Find_average_overhead = find_flag; |
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| 105 | } |
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