1 | /* bsp.h |
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2 | * |
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3 | * This include file contains all DMV152 board IO definitions. |
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4 | * |
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5 | * COPYRIGHT (c) 1989-1999. |
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6 | * On-Line Applications Research Corporation (OAR). |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #ifndef __DMV152_h |
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16 | #define __DMV152_h |
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17 | |
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18 | #ifdef __cplusplus |
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19 | extern "C" { |
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20 | #endif |
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21 | |
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22 | #include <bspopts.h> |
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23 | |
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24 | #include <rtems.h> |
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25 | #include <console.h> |
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26 | #include <clockdrv.h> |
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27 | #include <iosupp.h> |
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28 | #include <vmeintr.h> |
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29 | #include <zilog/z8530.h> |
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30 | #include <zilog/z8536.h> |
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31 | |
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32 | /* |
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33 | * confdefs.h overrides for this BSP: |
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34 | * - number of termios serial ports (defaults to 1) |
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35 | * - Interrupt stack space is not minimum if defined. |
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36 | */ |
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37 | |
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38 | /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ |
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39 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) |
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40 | |
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41 | /* |
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42 | * confdefs.h overrides for this BSP: |
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43 | * - termios serial ports (defaults to 1) |
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44 | * - Interrupt stack space is not minimum if defined. |
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45 | */ |
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46 | |
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47 | #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 |
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48 | /* #define CONFIGURE_INTERRUPT_STACK_MEMORY (TBD * 1024) */ |
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49 | |
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50 | /* |
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51 | * Define the time limits for RTEMS Test Suite test durations. |
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52 | * Long test and short test duration limits are provided. These |
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53 | * values are in seconds and need to be converted to ticks for the |
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54 | * application. |
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55 | * |
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56 | */ |
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57 | |
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58 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
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59 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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60 | |
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61 | /* |
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62 | * Define the interrupt mechanism for Time Test 27 |
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63 | */ |
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64 | |
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65 | /* use a VMEbus interrupt */ |
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66 | |
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67 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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68 | |
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69 | #define Install_tm27_vector( handler ) \ |
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70 | { \ |
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71 | set_vector( (handler), 0x50, 1 ); \ |
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72 | (*(volatile rtems_unsigned32 *)0x0d800024) = 0x50; /* set IVECT reg */ \ |
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73 | (*(volatile rtems_unsigned8 *)0x0d00000c) = 0x40; /* set VIE reg */ \ |
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74 | } |
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75 | |
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76 | #define Cause_tm27_intr() \ |
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77 | (*(volatile rtems_unsigned8 *)0x0d000003) = 0x0f /* set VINT */ |
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78 | |
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79 | #define Clear_tm27_intr() /* no operation necessary */ |
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80 | |
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81 | #define Lower_tm27_intr() |
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82 | |
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83 | /* |
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84 | * Simple spin delay in microsecond units for device drivers. |
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85 | * This is very dependent on the clock speed of the target. |
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86 | */ |
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87 | |
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88 | #define rtems_bsp_delay( microseconds ) \ |
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89 | { register rtems_unsigned32 _delay=(microseconds); \ |
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90 | register rtems_unsigned32 _tmp=123; \ |
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91 | asm volatile( "0: \ |
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92 | nbcd %0 ; \ |
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93 | nbcd %0 ; \ |
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94 | dbf %1,0b" \ |
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95 | : "=d" (_tmp), "=d" (_delay) \ |
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96 | : "0" (_tmp), "1" (_delay) ); \ |
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97 | } |
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98 | |
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99 | /* macros */ |
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100 | |
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101 | #undef Z8x36_STATE0 |
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102 | #undef Z8x36_WRITE |
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103 | #undef Z8x36_READ |
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104 | |
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105 | #define Z8x36_STATE0 ( z8536 ) \ |
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106 | { char *garbage; \ |
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107 | (garbage) = *(VOL8(z8536+0x7)) \ |
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108 | } |
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109 | |
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110 | #define Z8x36_WRITE( z8536, reg, data ) \ |
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111 | *(VOL8(z8536+0x7)) = (reg); \ |
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112 | *(VOL8(z8536+0x7)) = (data) |
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113 | |
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114 | #define Z8x36_READ( z8536, reg, data ) \ |
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115 | *(VOL8(z8536+0x7)) = (reg); \ |
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116 | (data) = *(VOL8(z8536+0x7)) |
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117 | |
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118 | /* |
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119 | * ACC Register Addresses |
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120 | */ |
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121 | |
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122 | #define ACC_BASE 0x0D000000 |
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123 | |
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124 | #define ACC_STAT0 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x00)) |
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125 | #define ACC_STAT1 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x01)) |
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126 | #define ACC_GENCTL ((volatile rtems_unsigned8 *) (ACC_BASE + 0x02)) |
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127 | #define ACC_VINT ((volatile rtems_unsigned8 *) (ACC_BASE + 0x03)) |
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128 | #define ACC_VREQ ((volatile rtems_unsigned8 *) (ACC_BASE + 0x04)) |
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129 | #define ACC_VARB ((volatile rtems_unsigned8 *) (ACC_BASE + 0x05)) |
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130 | #define ACC_ID ((volatile rtems_unsigned8 *) (ACC_BASE + 0x06)) |
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131 | #define ACC_CTL2 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x07)) |
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132 | #define ACC_7IS ((volatile rtems_unsigned8 *) (ACC_BASE + 0x08)) |
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133 | #define ACC_LIS ((volatile rtems_unsigned8 *) (ACC_BASE + 0x09)) |
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134 | #define ACC_7IE ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0A)) |
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135 | #define ACC_LIE ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0B)) |
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136 | #define ACC_VIE ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0C)) |
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137 | #define ACC_IC10 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0D)) |
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138 | #define ACC_IC32 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0E)) |
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139 | #define ACC_IC54 ((volatile rtems_unsigned8 *) (ACC_BASE + 0x0F)) |
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140 | |
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141 | /* constants */ |
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142 | |
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143 | #define TIMER 0x0c000000 |
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144 | #define TIMER_VECTOR 0x4D |
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145 | |
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146 | #define CONSOLE_CONTROL_A 0x0C800005 |
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147 | #define CONSOLE_DATA_A 0x0C800007 |
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148 | #define CONSOLE_CONTROL_B 0x0C800001 |
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149 | #define CONSOLE_DATA_B 0x0C800003 |
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150 | |
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151 | /* Structures */ |
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152 | |
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153 | /* none */ |
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154 | |
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155 | /* miscellaneous stuff assumed to exist */ |
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156 | |
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157 | extern rtems_configuration_table BSP_Configuration; |
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158 | |
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159 | extern m68k_isr_entry M68Kvec[]; /* vector table address */ |
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160 | |
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161 | /* |
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162 | * Device Driver Table Entries |
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163 | */ |
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164 | |
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165 | /* |
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166 | * NOTE: Use the standard Console driver entry |
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167 | */ |
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168 | |
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169 | /* |
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170 | * NOTE: Use the standard Clock driver entry |
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171 | */ |
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172 | |
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173 | /* functions */ |
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174 | |
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175 | void bsp_cleanup( void ); |
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176 | |
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177 | m68k_isr_entry set_vector( |
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178 | rtems_isr_entry handler, |
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179 | rtems_vector_number vector, |
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180 | int type |
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181 | ); |
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182 | |
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183 | #ifdef __cplusplus |
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184 | } |
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185 | #endif |
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186 | |
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187 | #endif |
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188 | /* end of include file */ |
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