source: rtems/c/src/lib/libbsp/m68k/dmv152/clock/ckinit.c @ 5072b07

4.104.114.84.95
Last change on this file since 5072b07 was ac7d5ef0, checked in by Joel Sherrill <joel.sherrill@…>, on 05/11/95 at 17:39:37

Initial revision

  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*  Clock_init()
2 *
3 *  This routine initializes the Z80386 1 on the MVME136 board.
4 *  The tick frequency is 1 millisecond.
5 *
6 *  Input parameters:  NONE
7 *
8 *  Output parameters:  NONE
9 *
10 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
11 *  On-Line Applications Research Corporation (OAR).
12 *  All rights assigned to U.S. Government, 1994.
13 *
14 *  This material may be reproduced by or for the U.S. Government pursuant
15 *  to the copyright license under the clause at DFARS 252.227-7013.  This
16 *  notice must appear in all copies of this file and its derivatives.
17 *
18 *  $Id$
19 */
20
21#include <stdlib.h>
22
23#include <rtems.h>
24#include <bsp.h>
25#include <clockdrv.h>
26
27rtems_unsigned32 Clock_isrs;        /* ISRs until next tick */
28volatile rtems_unsigned32 Clock_driver_ticks;
29                                    /* ticks since initialization */
30rtems_isr_entry  Old_ticker;
31
32rtems_device_driver Clock_initialize(
33  rtems_device_major_number major,
34  rtems_device_minor_number minor,
35  void *pargp,
36  rtems_id tid,
37  rtems_unsigned32 *rval
38)
39{
40  Install_clock( Clock_isr );
41}
42
43void ReInstall_clock(
44  rtems_isr_entry clock_isr
45)
46{
47  rtems_unsigned32 isrlevel = 0 ;
48
49  rtems_interrupt_disable( isrlevel );
50   (void) set_vector( clock_isr, TIMER_VECTOR, 1 );
51  rtems_interrupt_enable( isrlevel );
52}
53
54void Install_clock(
55  rtems_isr_entry clock_isr
56)
57{
58  rtems_unsigned8 data;
59
60  Clock_driver_ticks = 0;
61  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
62
63  if ( BSP_Configuration.ticks_per_timeslice ) {
64    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_VECTOR, 1 );
65
66    Z8x36_WRITE( TIMER, MASTER_CFG, 0xd4 );
67    Z8x36_READ ( TIMER, MASTER_INTR, data );
68    Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x7E) );
69    Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x04 );
70    Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0xCE );
71    Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x83 );
72    Z8x36_WRITE( TIMER, CNT_TMR_VECTOR, TIMER_VECTOR );
73    Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0x20 );
74    Z8x36_READ ( TIMER, MASTER_INTR, data );
75    Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0xDA) | 0x80 );
76
77    /*
78     * ACC_IC54 - interrupt 5 will be vectored and mapped to level 6
79     */
80
81    data = (*(rtems_unsigned8 *)0x0D00000B);
82    (*(rtems_unsigned8 *)0x0D00000B) = (data & 0x7F) | 0x60;
83
84    Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xC6 );
85
86    atexit( Clock_exit );
87  }
88}
89
90void Clock_exit( void )
91{
92  rtems_unsigned8 data;
93
94  if ( BSP_Configuration.ticks_per_timeslice ) {
95
96    Z8x36_READ ( TIMER, MASTER_INTR, data );
97    Z8x36_WRITE( TIMER, MASTER_INTR, (data & 0x01) );
98    /* do not restore old vector */
99
100  }
101}
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