source: rtems/c/src/lib/libbsp/lm32/shared/tsmac/tsmac.h @ b1783062

4.104.115
Last change on this file since b1783062 was b1783062, checked in by Joel Sherrill <joel.sherrill@…>, on 12/04/08 at 22:55:13

2008-12-04 Jukka Pietarinen <jukka.pietarinen@…>

  • ChangeLog?, Makefile.am, README, acinclude.m4, configure.ac, shared/clock/ckinit.c, shared/clock/clock.h, shared/console/console.c, shared/console/uart.c, shared/console/uart.h, shared/start/start.S, shared/startup/bspstart.c, shared/startup/setvec.c, shared/timer/timer.c, shared/tsmac/dp83848phy.h, shared/tsmac/tsmac.c, shared/tsmac/tsmac.h: New files.
  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*
2 *  This file contains definitions for LatticeMico32 TSMAC (Tri-Speed MAC)
3 *
4 *  COPYRIGHT (c) 1989-1999.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 *
13 *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
14 *  Micro-Research Finland Oy
15 */
16
17#ifndef _BSPTSMAC_H
18#define _BSPTSMAC_H
19
20/* FIFO Registers */
21
22#define LM32_TSMAC_RX_LEN_FIFO        (0x000)
23#define LM32_TSMAC_RX_DATA_FIFO       (0x004)
24#define LM32_TSMAC_TX_LEN_FIFO        (0x008)
25#define LM32_TSMAC_TX_DATA_FIFO       (0x00C)
26
27/* Control and Status Registers */
28
29#define LM32_TSMAC_VERID              (0x100)
30#define LM32_TSMAC_INTR_SRC           (0x104)
31#define INTR_RX_SMRY                  (0x00020000)
32#define INTR_TX_SMRY                  (0x00010000)
33#define INTR_RX_FIFO_FULL             (0x00001000)
34#define INTR_RX_ERROR                 (0x00000800)
35#define INTR_RX_FIFO_ERROR            (0x00000400)
36#define INTR_RX_FIFO_ALMOST_FULL      (0x00000200)
37#define INTR_RX_PKT_RDY               (0x00000100)
38#define INTR_TX_FIFO_FULL             (0x00000010)
39#define INTR_TX_DISCFRM               (0x00000008)
40#define INTR_TX_FIFO_ALMOST_EMPTY     (0x00000004)
41#define INTR_TX_FIFO_ALMOST_FULL      (0x00000002)
42#define INTR_TX_PKT_SENT              (0x00000001)
43#define LM32_TSMAC_INTR_ENB           (0x108)
44#define INTR_ENB                      (0x00040000)
45#define LM32_TSMAC_RX_STATUS          (0x10C)
46#define STAT_RX_FIFO_FULL             (0x00000010)
47#define STAT_RX_ERROR                 (0x00000008)
48#define STAT_RX_FIFO_ERROR            (0x00000004)
49#define STAT_RX_FIFO_ALMOST_FULL      (0x00000002)
50#define STAT_RX_PKT_RDY               (0x00000001)
51#define LM32_TSMAC_TX_STATUS          (0x110)
52#define STAT_TX_FIFO_FULL             (0x00000010)
53#define STAT_TX_DISCFRM               (0x00000008)
54#define STAT_TX_FIFO_ALMOST_EMPTY     (0x00000004)
55#define STAT_TX_FIFO_ALMOST_FULL      (0x00000002)
56#define STAT_TX_PKT_SENT              (0x00000001)
57#define LM32_TSMAC_RX_FRAMES_CNT      (0x114)
58#define LM32_TSMAC_TX_FRAMES_CNT      (0x118)
59#define LM32_TSMAC_RX_FIFO_TH         (0x11C)
60#define LM32_TSMAC_TX_FIFO_TH         (0x120)
61#define LM32_TSMAC_SYS_CTL            (0x124)
62#define SYS_CTL_TX_FIFO_FLUSH         (0x00000010)
63#define SYS_CTL_RX_FIFO_FLUSH         (0x00000008)
64#define SYS_CTL_TX_SNDPAUSREQ         (0x00000004)
65#define SYS_CTL_TX_FIFOCTRL           (0x00000002)
66#define SYS_CTL_IGNORE_NEXT_PKT       (0x00000001)
67#define LM32_TSMAC_PAUSE_TMR          (0x128)
68
69/* Tri-Speed MAC Registers */
70
71#define LM32_TSMAC_MAC_REGS_DATA      (0x200)
72#define LM32_TSMAC_MAC_REGS_ADDR_RW   (0x204)
73#define REGS_ADDR_WRITE               (0x80000000)
74#define LM32_TSMAC_MODE_BYTE0         (0x000)
75#define MODE_TX_EN                    (1<<3)
76#define MODE_RX_EN                    (1<<2)
77#define MODE_FC_EN                    (1<<1)
78#define MODE_GBIT_EN                  (1<<0)
79#define LM32_TSMAC_TX_RX_CTL_BYTE0    (0x002)
80#define TX_RX_CTL_RECEIVE_SHORT       (1<<8)
81#define TX_RX_CTL_RECEIVE_BRDCST      (1<<7)
82#define TX_RX_CTL_DIS_RTRY            (1<<6)
83#define TX_RX_CTL_HDEN                (1<<5)
84#define TX_RX_CTL_RECEIVE_MLTCST      (1<<4)
85#define TX_RX_CTL_RECEIVE_PAUSE       (1<<3)
86#define TX_RX_CTL_TX_DIS_FCS          (1<<2)
87#define TX_RX_CTL_DISCARD_FCS         (1<<1)
88#define TX_RX_CTL_PRMS                (1<<0)
89#define LM32_TSMAC_MAX_PKT_SIZE_BYTE0 (0x004)
90#define LM32_TSMAC_IPG_VAL_BYTE0      (0x008)
91#define LM32_TSMAC_MAC_ADDR_0_BYTE0   (0x00A)
92#define LM32_TSMAC_MAC_ADDR_1_BYTE0   (0x00C)
93#define LM32_TSMAC_MAC_ADDR_2_BYTE0   (0x00E)
94#define LM32_TSMAC_TX_RX_STS_BYTE0    (0x012)
95#define TX_RX_STS_RX_IDLE             (1<<10)
96#define TX_RX_STS_TAGGED_FRAME        (1<<9)
97#define TX_RX_STS_BRDCST_FRAME        (1<<8)
98#define TX_RX_STS_MULTCST_FRAME       (1<<7)
99#define TX_RX_STS_IPG_SHRINK          (1<<6)
100#define TX_RX_STS_SHORT_FRAME         (1<<5)
101#define TX_RX_STS_LONG_FRAME          (1<<4)
102#define TX_RX_STS_ERROR_FRAME         (1<<3)
103#define TX_RX_STS_CRC                 (1<<2)
104#define TX_RX_STS_PAUSE_FRAME         (1<<1)
105#define TX_RX_STS_TX_IDLE             (1<<0)
106#define LM32_TSMAC_GMII_MNG_CTL_BYTE0 (0x014)
107#define GMII_MNG_CTL_CMD_FIN          (1<<14)
108#define GMII_MNG_CTL_READ_PHYREG      (0)
109#define GMII_MNG_CTL_WRITE_PHYREG     (1<<13)
110#define GMII_MNG_CTL_PHY_ADD_MASK     (0x001f)
111#define GMII_MNG_CTL_PHY_ADD_SHIFT    (8)
112#define GMII_MNG_CTL_REG_ADD_MASK     (0x001f)
113#define GMII_MNG_CTL_REG_ADD_SHIFT    (0)
114#define LM32_TSMAC_GMII_MNG_DAT_BYTE0 (0x016)
115#define LM32_TSMAC_MLT_TAB_0_BYTE0    (0x022)
116#define LM32_TSMAC_MLT_TAB_1_BYTE0    (0x024)
117#define LM32_TSMAC_MLT_TAB_2_BYTE0    (0x026)
118#define LM32_TSMAC_MLT_TAB_3_BYTE0    (0x028)
119#define LM32_TSMAC_MLT_TAB_4_BYTE0    (0x02A)
120#define LM32_TSMAC_MLT_TAB_5_BYTE0    (0x02C)
121#define LM32_TSMAC_MLT_TAB_6_BYTE0    (0x02E)
122#define LM32_TSMAC_MLT_TAB_7_BYTE0    (0x030)
123#define LM32_TSMAC_VLAN_TAG_BYTE0     (0x032)
124#define LM32_TSMAC_PAUS_OP_BYTE0      (0x034)
125
126/* Receive Statistics Counters */
127
128#define LM32_TSMAC_RX_PKT_IGNR_CNT    (0x300)
129#define LM32_TSMAC_RX_LEN_CHK_ERR_CNT (0x304)
130#define LM32_TSMAC_RX_LNG_FRM_CNT     (0x308)
131#define LM32_TSMAC_RX_SHRT_FRM_CNT    (0x30C)
132#define LM32_TSMAC_RX_IPG_VIOL_CNT    (0x310)
133#define LM32_TSMAC_RX_CRC_ERR_CNT     (0x314)
134#define LM32_TSMAC_RX_OK_PKT_CNT      (0x318)
135#define LM32_TSMAC_RX_CTL_FRM_CNT     (0x31C)
136#define LM32_TSMAC_RX_PAUSE_FRM_CNT   (0x320)
137#define LM32_TSMAC_RX_MULTICAST_CNT   (0x324)
138#define LM32_TSMAC_RX_BRDCAST_CNT     (0x328)
139#define LM32_TSMAC_RX_VLAN_TAG_CNT    (0x32C)
140#define LM32_TSMAC_RX_PRE_SHRINK_CNT  (0x330)
141#define LM32_TSMAC_RX_DRIB_NIB_CNT    (0x334)
142#define LM32_TSMAC_RX_UNSUP_OPCD_CNT  (0x338)
143#define LM32_TSMAC_RX_BYTE_CNT        (0x33C)
144
145/* Transmit Statistics Counters */
146
147#define LM32_TSMAC_TX_UNICAST_CNT     (0x400)
148#define LM32_TSMAC_TX_PAUSE_FRM_CNT   (0x404)
149#define LM32_TSMAC_TX_MULTICAST_CNT   (0x408)
150#define LM32_TSMAC_TX_BRDCAST_CNT     (0x40C)
151#define LM32_TSMAC_TX_VLAN_TAG_CNT    (0x410)
152#define LM32_TSMAC_TX_BAD_FCS_CNT     (0x414)
153#define LM32_TSMAC_TX_JUMBO_CNT       (0x418)
154#define LM32_TSMAC_TX_BYTE_CNT        (0x41C)
155
156#ifdef CPU_U32_FIX
157void ipalign(struct mbuf *m);
158#endif
159
160#endif /* _BSPTSMAC_H */
Note: See TracBrowser for help on using the repository browser.