source: rtems/c/src/lib/libbsp/lm32/shared/tsmac/dp83848phy.h @ b1783062

4.104.115
Last change on this file since b1783062 was b1783062, checked in by Joel Sherrill <joel.sherrill@…>, on 12/04/08 at 22:55:13

2008-12-04 Jukka Pietarinen <jukka.pietarinen@…>

  • ChangeLog?, Makefile.am, README, acinclude.m4, configure.ac, shared/clock/ckinit.c, shared/clock/clock.h, shared/console/console.c, shared/console/uart.c, shared/console/uart.h, shared/start/start.S, shared/startup/bspstart.c, shared/startup/setvec.c, shared/timer/timer.c, shared/tsmac/dp83848phy.h, shared/tsmac/tsmac.c, shared/tsmac/tsmac.h: New files.
  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*
2 *  This file contains definitions for LatticeMico32 TSMAC (Tri-Speed MAC)
3 *
4 *  COPYRIGHT (c) 1989-1999.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  $Id$
12 *
13 *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
14 *  Micro-Research Finland Oy
15 */
16
17#ifndef _DP83848PHY_H
18#define _DP83848PHY_H
19
20#define DEFAULT_PHY_ADDRESS   (0x01)
21
22#define PHY_BMCR              (0x00)
23#define PHY_BMCR_RESET        (1<<15)
24#define PHY_BMCR_LOOPBACK     (1<<14)
25#define PHY_BMCR_SPEEDSEL     (1<<13)
26#define PHY_BMCR_AN_ENA       (1<<12)
27#define PHY_BMCR_PWRDWN       (1<<11)
28#define PHY_BMCR_ISOLATE      (1<<10)
29#define PHY_BMCR_RESTART_AN   (1<<9)
30#define PHY_BMCR_DUPLEX_MODE  (1<<8)
31#define PHY_BMCR_COLL_TEST    (1<<7)
32#define PHY_BMSR              (0x01)
33#define PHY_BMSR_100_T4       (1<<15)
34#define PHY_BMSR_100_TX_FD    (1<<14)
35#define PHY_BMSR_100_TX_HD    (1<<13)
36#define PHY_BMSR_10_T_FD      (1<<12)
37#define PHY_BMSR_10_T_HD      (1<<11)
38#define PHY_BMSR_PRESUP       (1<<6)
39#define PHY_BMSR_AN_CMPL      (1<<5)
40#define PHY_BMSR_REM_FLT      (1<<4)
41#define PHY_BMSR_AN_AB        (1<<3)
42#define PHY_BMSR_LINK_STAT    (1<<2)
43#define PHY_BMSR_JABBDET      (1<<1)
44#define PHY_BMSR_EXT_CAP      (1<<0)
45#define PHY_PHYIDR1           (0x02)
46#define DEFAULT_PHYIDR1       (0x2000)
47#define PHY_PHYIDR2           (0x03)
48#define DEFAULT_PHYIDR2       (0x5C90)
49#define PHY_ANAR              (0x04)
50#define PHY_ANAR_NP           (1<<15)
51#define PHY_ANAR_RF           (1<<13)
52#define PHY_ANAR_ASM_DIR      (1<<11)
53#define PHY_ANAR_PAUSE        (1<<10)
54#define PHY_ANAR_T4           (1<<9)
55#define PHY_ANAR_TX_FD        (1<<8)
56#define PHY_ANAR_TX           (1<<7)
57#define PHY_ANAR_10_FD        (1<<6)
58#define PHY_ANAR_10           (1<<5)
59#define PHY_ANAR_SEL_MASK     (0x0f)
60#define PHY_ANAR_SEL_SHIFT    (0)
61#define PHY_ANAR_SEL_DEF      (1)
62#define PHY_ANLPAR            (0x05)
63#define PHY_ANLPAR_NP         (1<<15)
64#define PHY_ANLPAR_ACK        (1<<14)
65#define PHY_ANLPAR_RF         (1<<13)
66#define PHY_ANLPAR_ASM_DIR    (1<<11)
67#define PHY_ANLPAR_PAUSE      (1<<10)
68#define PHY_ANLPAR_T4         (1<<9)
69#define PHY_ANLPAR_TX_FD      (1<<8)
70#define PHY_ANLPAR_TX         (1<<7)
71#define PHY_ANLPAR_10_FD      (1<<6)
72#define PHY_ANLPAR_10         (1<<5)
73#define PHY_ANLPAR_SEL_MASK   (0x0f)
74#define PHY_ANLPAR_SEL_SHIFT  (0)
75#define PHY_ANLPARNP          (0x05)
76#define PHY_ANLPARNP_NP       (1<<15)
77#define PHY_ANLPARNP_ACK      (1<<14)
78#define PHY_ANLPARNP_MP       (1<<13)
79#define PHY_ANLPARNP_ACK2     (1<<12)
80#define PHY_ANLPARNP_TOGGLE   (1<<11)
81#define PHY_ANLPARNP_CDE_MASK (0x03ff)
82#define PHY_ANER              (0x06)
83#define PHY_ANER_PDF          (1<<4)
84#define PHY_ANER_LP_NP_ABLE   (1<<3)
85#define PHY_ANER_NP_ABLE      (1<<2)
86#define PHY_ANER_PAGE_RX      (1<<1)
87#define PHY_ANER_LP_AN_ABLE   (1<<0)
88#define PHY_ANNPTR            (0x07)
89#define PHY_ANNPTR_NP         (1<<15)
90#define PHY_ANNPTR_MP         (1<<13)
91#define PHY_ANNPTR_ACK2       (1<<12)
92#define PHY_ANNPTR_TOG_TX     (1<<11)
93#define PHY_ANNPTR_CDE_MASK   (0x03ff)
94#define PHY_PHYSTS            (0x10)
95#define PHY_PHYSTS_MDIX_MDE   (1<<14)
96#define PHY_PHYSTS_RCV_ERRL   (1<<13)
97#define PHY_PHYSTS_POLSTAT    (1<<12)
98#define PHY_PHYSTS_FCSL       (1<<11)
99#define PHY_PHYSTS_SD         (1<<10)
100#define PHY_PHYSTS_DESCL      (1<<9)
101#define PHY_PHYSTS_PGREC      (1<<8)
102#define PHY_PHYSTS_MIIIRQ     (1<<7)
103#define PHY_PHYSTS_REM_FLT    (1<<6)
104#define PHY_PHYSTS_JABBDET    (1<<5)
105#define PHY_PHYSTS_AN_CMP     (1<<4)
106#define PHY_PHYSTS_LOOPBACK   (1<<3)
107#define PHY_PHYSTS_DUPLEX     (1<<2)
108#define PHY_PHYSTS_SPEED      (1<<1)
109#define PHY_PHYSTS_LINK       (1<<0)
110#define PHY_MICR              (0x11)
111#define PHY_MICR_TINT         (1<<2)
112#define PHY_MICR_INTEN        (1<<1)
113#define PHY_MICR_INT_OE       (1<<0)
114#define PHY_MISR              (0x12)
115#define PHY_MISR_ED_INT       (1<<14)
116#define PHY_MISR_LINK_INT     (1<<13)
117#define PHY_MISR_SPD_INT      (1<<12)
118#define PHY_MISR_DUP_INT      (1<<11)
119#define PHY_MISR_ANC_INT      (1<<10)
120#define PHY_MISR_FHF_INT      (1<<9)
121#define PHY_MISR_RHF_INT      (1<<8)
122#define PHY_MISR_ED_INT_EN    (1<<6)
123#define PHY_MISR_LINK_INT_EN  (1<<5)
124#define PHY_MISR_SPD_INT_EN   (1<<4)
125#define PHY_MISR_DUP_INT_EN   (1<<3)
126#define PHY_MISR_ANC_INT_EN   (1<<2)
127#define PHY_MISR_FHF_INT_EN   (1<<1)
128#define PHY_MISR_RHF_INT_EN   (1<<0)
129#define PHY_FCSCR             (0x14)
130#define PHY_RECR              (0x15)
131#define PHY_PCSR              (0x16)
132#define PHY_PCSR_TQ_EN        (1<<10)
133#define PHY_PCSR_SDFPMA       (1<<9)
134#define PHY_PCSR_SD_OPT       (1<<8)
135#define PHY_PCSR_DESC_TIME    (1<<7)
136#define PHY_PCSR_F_100_OK     (1<<5)
137#define PHY_PCSR_NRZI_BYPASS  (1<<2)
138#define PHY_RBR               (0x17)
139#define PHY_RBR_RMII_MODE     (1<<5)
140#define PHY_RBR_RMII_REV1_0   (1<<4)
141#define PHY_RBR_RX_OVF_STS    (1<<3)
142#define PHY_RBR_RX_UNF_STS    (1<<2)
143#define PHY_RBR_ELAST_BUF1    (1<<1)
144#define PHY_RBR_ELAST_BUF0    (1<<0)
145#define PHY_LEDCR             (0x18)
146#define PHY_LEDCR_DRV_SPDLED  (1<<5)
147#define PHY_LEDCR_DRV_LNKLED  (1<<4)
148#define PHY_LEDCR_DRV_ACTLED  (1<<3)
149#define PHY_LEDCR_SPDLED      (1<<2)
150#define PHY_LEDCR_LNKLED      (1<<1)
151#define PHY_LEDCR_ACTLED      (1<<0)
152#define PHY_PHYCR             (0x19)
153#define PHY_PHYCR_MDIX_EN     (1<<15)
154#define PHY_PHYCR_FORCE_MDIX  (1<<14)
155#define PHY_PHYCR_PAUSE_RX    (1<<13)
156#define PHY_PHYCR_PAUSE_TX    (1<<12)
157#define PHY_PHYCR_BIST_FE     (1<<11)
158#define PHY_PHYCR_PSR_15      (1<<10)
159#define PHY_PHYCR_BIST_STATUS (1<<9)
160#define PHY_PHYCR_BIST_START  (1<<8)
161#define PHY_PHYCR_BP_STRETCH  (1<<7)
162#define PHY_PHYCR_LED_CNFG1   (1<<6)
163#define PHY_PHYCR_LED_CNFG0   (1<<5)
164#define PHY_PHYCR_ADDR4       (1<<4)
165#define PHY_PHYCR_ADDR3       (1<<3)
166#define PHY_PHYCR_ADDR2       (1<<2)
167#define PHY_PHYCR_ADDR1       (1<<1)
168#define PHY_PHYCR_ADDR0       (1<<0)
169#define PHY_10BTSCR           (0x1A)
170#define PHY_10BTSCR_SERIAL    (1<<15)
171#define PHY_10BTSCR_SQ_MASK   (0x07)
172#define PHY_10BTSCR_SQ_SHIFT  (9)
173#define PHY_10BTSCR_LP_10_DIS (1<<8)
174#define PHY_10BTSCR_LP_DIS    (1<<7)
175#define PHY_10BTSCR_FLINK_10  (1<<1)
176#define PHY_10BTSCR_POL       (1<<4)
177#define PHY_10BTSCR_HB_DIS    (1<<1)
178#define PHY_10BTSCR_JAB_DIS   (1<<0)
179#define PHY_CDCTRL1           (0x1B)
180#define PHY_EDCR              (0x1D)
181
182#endif /* _DP83848PHY_H */
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