1 | /* LM32 startup code |
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2 | * |
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3 | * This is the entry point on reset and when loading the |
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4 | * executive from a bootloader. |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in the file LICENSE in this distribution or at |
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8 | * http://www.rtems.com/license/LICENSE. |
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9 | * |
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10 | * $Id$ |
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11 | * |
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12 | * Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008, |
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13 | * Micro-Research Finland Oy |
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14 | */ |
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15 | |
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16 | #include "bspopts.h" |
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17 | |
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18 | .section .boot,"a",@progbits |
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19 | .align 4 |
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20 | |
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21 | .globl start |
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22 | .type start,@function |
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23 | .globl _start |
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24 | .type _start,@function |
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25 | .globl __start |
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26 | .type __start,@function |
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27 | .globl LatticeDDInit |
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28 | .type LatticeDDInit,@function |
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29 | .globl crt0 |
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30 | .type crt0,@function |
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31 | |
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32 | LatticeDDInit: |
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33 | __start: |
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34 | _start: |
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35 | start: |
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36 | /* Clear r0 */ |
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37 | xor r0,r0,r0 |
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38 | /* Disable interrupts */ |
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39 | wcsr IE, r0 |
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40 | /* Mask all interrupts */ |
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41 | wcsr IM,r0 |
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42 | /* Set exception base address */ |
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43 | mvhi r1, hi(start) |
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44 | ori r1, r1, lo(start) |
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45 | wcsr EBA, r1 |
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46 | bi crt0 |
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47 | nop |
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48 | /* |
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49 | * Unused handlers call debug handlers |
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50 | */ |
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51 | breakpoint_handler: |
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52 | rcsr r7, DEBA |
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53 | addi r7, r7, 32 |
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54 | b r7 |
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55 | nop |
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56 | nop |
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57 | nop |
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58 | nop |
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59 | nop |
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60 | instruction_bus_error_handler: |
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61 | rcsr r7, DEBA |
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62 | addi r7, r7, 64 |
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63 | b r7 |
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64 | nop |
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65 | nop |
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66 | nop |
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67 | nop |
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68 | nop |
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69 | watchpoint_handler: |
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70 | rcsr r7, DEBA |
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71 | addi r7, r7, 96 |
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72 | b r7 |
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73 | nop |
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74 | nop |
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75 | nop |
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76 | nop |
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77 | nop |
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78 | data_bus_error_handler: |
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79 | rcsr r7, DEBA |
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80 | addi r7, r7, 128 |
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81 | b r7 |
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82 | nop |
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83 | nop |
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84 | nop |
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85 | nop |
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86 | nop |
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87 | divide_by_zero_handler: |
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88 | rcsr r7, DEBA |
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89 | addi r7, r7, 160 |
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90 | b r7 |
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91 | nop |
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92 | nop |
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93 | nop |
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94 | nop |
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95 | nop |
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96 | interrupt_handler: |
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97 | .extern _ISR_Handler |
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98 | mvhi r0, hi(_ISR_Handler) |
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99 | ori r0, r0, lo(_ISR_Handler) |
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100 | b r0 |
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101 | nop |
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102 | nop |
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103 | nop |
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104 | nop |
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105 | nop |
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106 | system_call_handler: |
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107 | rcsr r7, DEBA |
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108 | addi r7, r7, 224 |
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109 | b r7 |
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110 | nop |
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111 | nop |
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112 | nop |
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113 | nop |
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114 | nop |
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115 | |
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116 | crt0: |
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117 | /* Flush data cache */ |
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118 | addi r1, r0, 1 |
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119 | wcsr DCC, r1 |
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120 | nop |
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121 | nop |
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122 | nop |
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123 | nop |
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124 | /* Flush Instruction Cache */ |
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125 | wcsr ICC, r1 |
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126 | nop |
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127 | nop |
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128 | nop |
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129 | nop |
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130 | /* Initialize stack pointer */ |
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131 | mvhi sp, hi(_fstack-4) |
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132 | ori sp, sp, lo(_fstack-4) |
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133 | /* Initialize global pointer */ |
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134 | mvhi gp, hi(_edata) |
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135 | ori gp, gp, lo(_edata) |
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136 | /* Clear bss */ |
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137 | mvhi r1, hi(_clear_start) |
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138 | ori r1, r1, lo(_clear_start) |
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139 | mvhi r3, hi(_clear_end) |
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140 | ori r3, r3, lo(_clear_end) |
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141 | .clear_bss: |
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142 | be r1, r3, .end_clear_bss |
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143 | sw (r1+0), r0 |
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144 | addi r1, r1, 4 |
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145 | bi .clear_bss |
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146 | .end_clear_bss: |
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147 | mvi r1, 0 |
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148 | mvhi r7, hi(boot_card) |
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149 | ori r7, r7, lo(boot_card) |
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150 | call r7 |
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151 | # boot_card returns when RTEMS is shutdown |
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152 | #if ON_SIMULATOR |
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153 | #if defined(ON_GDB_SIM) |
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154 | #define SYS_exit 1 |
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155 | mvi r8, SYS_exit |
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156 | scall |
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157 | #else |
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158 | # on qemu-lm32 |
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159 | #define SYS_CTRL_REG 0xffff0000 |
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160 | mvhi r7, hi(SYS_CTRL_REG) |
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161 | ori r7, r7, lo(SYS_CTRL_REG) |
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162 | sw (r7+0), r0 |
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163 | #endif |
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164 | #endif |
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165 | |
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166 | .dead_end: |
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167 | bi .dead_end |
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168 | |
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