source: rtems/c/src/lib/libbsp/lm32/shared/milkymist_tmu/tmu.c @ dce1032b

4.115
Last change on this file since dce1032b was dce1032b, checked in by Joel Sherrill <joel.sherrill@…>, on 08/01/11 at 13:48:40

2011-08-01 Sebastien Bourdeauducq <sebastien.bourdeauducq@…>

PR 1869/bsps

  • startup/bspclean.c: New file.
  • include/tm27.h: Removed.
  • ChangeLog?, Makefile.am, README, preinstall.am, include/bsp.h, include/system_conf.h, make/custom/milkymist.cfg, startup/linkcmds: Complete BSP for Milkymist One supporting Milkymist SOC 1.0.x. Includes new or updated drivers for:
    • Multi-standard video input (PAL/SECAM/NTSC)
    • Two DMX512 (RS485) ports
    • MIDI IN and MIDI OUT ports
    • VGA output
    • AC'97 audio
    • NOR flash
    • 10/100 Ethernet
    • Memory card (experimental and incomplete)
    • USB host connectors (input devices only)
    • RC5 infrared receiver
    • RS232 debug port
  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*  tmu.c
2 *
3 *  Milkymist TMU driver for RTEMS
4 *
5 *  The license and distribution terms for this file may be
6 *  found in the file LICENSE in this distribution or at
7 *  http://www.rtems.com/license/LICENSE.
8 *
9 *  $Id$
10 *
11 *  COPYRIGHT (c) 2010, 2011 Sebastien Bourdeauducq
12 */
13
14#define RTEMS_STATUS_CHECKS_USE_PRINTK
15
16#include <stdlib.h>
17#include <stdio.h>
18#include <errno.h>
19#include <sys/types.h>
20#include <rtems.h>
21#include <bsp.h>
22#include <bsp/irq-generic.h>
23#include <rtems/libio.h>
24#include <rtems/status-checks.h>
25#include "../include/system_conf.h"
26#include "milkymist_tmu.h"
27
28#define DEVICE_NAME "/dev/tmu"
29
30static rtems_id done_sem;
31
32static rtems_isr done_handler(rtems_vector_number n)
33{
34  rtems_semaphore_release(done_sem);
35  lm32_interrupt_ack(1 << MM_IRQ_TMU);
36}
37
38rtems_device_driver tmu_initialize(
39  rtems_device_major_number major,
40  rtems_device_minor_number minor,
41  void *arg
42)
43{
44  rtems_status_code sc;
45  rtems_isr_entry dummy;
46
47  sc = rtems_io_register_name(DEVICE_NAME, major, 0);
48  RTEMS_CHECK_SC(sc, "create TMU device");
49
50  sc = rtems_semaphore_create(
51    rtems_build_name('T', 'M', 'U', ' '),
52    0,
53    RTEMS_SIMPLE_BINARY_SEMAPHORE,
54    0,
55    &done_sem
56  );
57  RTEMS_CHECK_SC(sc, "create TMU done semaphore");
58
59  rtems_interrupt_catch(done_handler, MM_IRQ_TMU, &dummy);
60  bsp_interrupt_vector_enable(MM_IRQ_TMU);
61
62  return RTEMS_SUCCESSFUL;
63}
64
65static void invalidate_l2(void)
66{
67  volatile char *flushbase = (char *)FMLBRG_FLUSH_BASE;
68  int i, offset;
69
70  offset = 0;
71  for (i=0;i<FMLBRG_LINE_COUNT;i++) {
72    flushbase[offset] = 0;
73    offset += FMLBRG_LINE_LENGTH;
74  }
75}
76
77static bool invalidate_after;
78
79static void tmu_start(struct tmu_td *td)
80{
81  if (td->invalidate_before)
82    invalidate_l2();
83
84  MM_WRITE(MM_TMU_HMESHLAST, td->hmeshlast);
85  MM_WRITE(MM_TMU_VMESHLAST, td->vmeshlast);
86  MM_WRITE(MM_TMU_BRIGHTNESS, td->brightness);
87  MM_WRITE(MM_TMU_CHROMAKEY, td->chromakey);
88
89  MM_WRITE(MM_TMU_VERTICESADR, (unsigned int)td->vertices);
90  MM_WRITE(MM_TMU_TEXFBUF, (unsigned int)td->texfbuf);
91  MM_WRITE(MM_TMU_TEXHRES, td->texhres);
92  MM_WRITE(MM_TMU_TEXVRES, td->texvres);
93  MM_WRITE(MM_TMU_TEXHMASK, td->texhmask);
94  MM_WRITE(MM_TMU_TEXVMASK, td->texvmask);
95
96  MM_WRITE(MM_TMU_DSTFBUF, (unsigned int)td->dstfbuf);
97  MM_WRITE(MM_TMU_DSTHRES, td->dsthres);
98  MM_WRITE(MM_TMU_DSTVRES, td->dstvres);
99  MM_WRITE(MM_TMU_DSTHOFFSET, td->dsthoffset);
100  MM_WRITE(MM_TMU_DSTVOFFSET, td->dstvoffset);
101  MM_WRITE(MM_TMU_DSTSQUAREW, td->dstsquarew);
102  MM_WRITE(MM_TMU_DSTSQUAREH, td->dstsquareh);
103
104  MM_WRITE(MM_TMU_ALPHA, td->alpha);
105
106  MM_WRITE(MM_TMU_CTL, td->flags|TMU_CTL_START);
107
108  invalidate_after = td->invalidate_after;
109}
110
111static rtems_status_code tmu_finalize(void)
112{
113  rtems_status_code sc;
114
115  sc = rtems_semaphore_obtain(done_sem, RTEMS_WAIT, 100);
116  if (sc != RTEMS_SUCCESSFUL)
117    return sc;
118
119  if (invalidate_after) {
120    invalidate_l2();
121    __asm__ volatile( /* Invalidate Level-1 data cache */
122      "wcsr DCC, r0\n"
123      "nop\n"
124    );
125  }
126
127  return RTEMS_SUCCESSFUL;
128}
129
130rtems_device_driver tmu_control(
131  rtems_device_major_number major,
132  rtems_device_minor_number minor,
133  void *arg
134)
135{
136  rtems_libio_ioctl_args_t *args = arg;
137  struct tmu_td *td = (struct tmu_td *)args->buffer;
138  rtems_status_code sc;
139
140  switch (args->command) {
141    case TMU_EXECUTE:
142      tmu_start(td);
143      sc = tmu_finalize();
144      break;
145    case TMU_EXECUTE_NONBLOCK:
146      tmu_start(td);
147      sc = RTEMS_SUCCESSFUL;
148      break;
149    case TMU_EXECUTE_WAIT:
150      sc = tmu_finalize();
151      break;
152    default:
153      sc = RTEMS_UNSATISFIED;
154      break;
155  }
156
157  if (sc == RTEMS_SUCCESSFUL)
158    args->ioctl_return = 0;
159  else
160    args->ioctl_return = -1;
161
162  return sc;
163}
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