source: rtems/c/src/lib/libbsp/lm32/shared/console/uart.h @ 9b4422a2

4.115
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 15:09:24

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.
  • Property mode set to 100644
File size: 2.3 KB
Line 
1/*
2 *  This file contains definitions for LatticeMico32 UART
3 *
4 *  COPYRIGHT (c) 1989-1999.
5 *  On-Line Applications Research Corporation (OAR).
6 *
7 *  The license and distribution terms for this file may be
8 *  found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 *  Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
12 *  Micro-Research Finland Oy
13 */
14
15#ifndef _BSPUART_H
16#define _BSPUART_H
17
18void BSP_uart_init(int baud);
19
20/* Receive buffer register / transmit holding register */
21
22#define LM32_UART_RBR      (0x0000)
23
24/* Interrupt enable register */
25
26#define LM32_UART_IER      (0x0004)
27#define LM32_UART_IER_RBRI (0x0001)
28#define LM32_UART_IER_THRI (0x0002)
29#define LM32_UART_IER_RLSI (0x0004)
30#define LM32_UART_IER_MSI  (0x0008)
31
32/* Interrupt identification register */
33
34#define LM32_UART_IIR      (0x0008)
35#define LM32_UART_IIR_STAT (0x0001)
36#define LM32_UART_IIR_ID0  (0x0002)
37#define LM32_UART_IIR_ID1  (0x0004)
38
39/* Line control register */
40
41#define LM32_UART_LCR      (0x000C)
42#define LM32_UART_LCR_WLS0 (0x0001)
43#define LM32_UART_LCR_WLS1 (0x0002)
44#define LM32_UART_LCR_STB  (0x0004)
45#define LM32_UART_LCR_PEN  (0x0008)
46#define LM32_UART_LCR_EPS  (0x0010)
47#define LM32_UART_LCR_SP   (0x0020)
48#define LM32_UART_LCR_SB   (0x0040)
49#define LM32_UART_LCR_5BIT (0)
50#define LM32_UART_LCR_6BIT (LM32_UART_LCR_WLS0)
51#define LM32_UART_LCR_7BIT (LM32_UART_LCR_WLS1)
52#define LM32_UART_LCR_8BIT (LM32_UART_LCR_WLS1 | LM32_UART_LCR_WLS0)
53
54/* Modem control register */
55
56#define LM32_UART_MCR      (0x0010)
57#define LM32_UART_MCR_DTR  (0x0001)
58#define LM32_UART_MCR_RTS  (0x0002)
59
60/* Line status register */
61
62#define LM32_UART_LSR      (0x0014)
63#define LM32_UART_LSR_DR   (0x0001)
64#define LM32_UART_LSR_OE   (0x0002)
65#define LM32_UART_LSR_PE   (0x0004)
66#define LM32_UART_LSR_FE   (0x0008)
67#define LM32_UART_LSR_BI   (0x0010)
68#define LM32_UART_LSR_THRE (0x0020)
69#define LM32_UART_LSR_TEMT (0x0040)
70
71/* Modem status register */
72
73#define LM32_UART_MSR      (0x0018)
74#define LM32_UART_MSR_DCTS (0x0001)
75#define LM32_UART_MSR_DDSR (0x0002)
76#define LM32_UART_MSR_TERI (0x0004)
77#define LM32_UART_MSR_DDCD (0x0008)
78#define LM32_UART_MSR_CTS  (0x0010)
79#define LM32_UART_MSR_DSR  (0x0020)
80#define LM32_UART_MSR_RI   (0x0040)
81#define LM32_UART_MSR_DCD  (0x0000)
82
83/* Baud-rate divisor register */
84
85#define LM32_UART_DIV      (0x001C)
86
87#endif /* _BSPUART_H */
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