source: rtems/c/src/lib/libbsp/i960/rxgen960/startup/setvec.c @ f05b2ac

4.104.114.84.95
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 16:01:48

Remove duplicate white lines.
  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*  set_vector
2 *
3 *  This routine attempts to perform all "generic" interrupt initialization
4 *  for the specified XINT line.
5 *
6 *  INPUT:
7 *    func  - interrupt handler entry point
8 *    xint  - external interrupt line
9 *    type  - 0 indicates raw hardware connect
10 *            1 indicates RTEMS interrupt connect
11 *
12 *  RETURNS:
13 *    address of previous interrupt handler
14 *
15 *  COPYRIGHT (c) 1989-1997.
16 *  On-Line Applications Research Corporation (OAR).
17 *
18 *  The license and distribution terms for this file may in
19 *  the file LICENSE in this distribution or at
20 *  http://www.rtems.com/license/LICENSE.
21 *
22 *  $Id$
23 */
24/*
25 * i960rp specific function added
26 */
27
28#include <rtems.h>
29#include <bsp.h>
30
31#include <stdio.h>
32
33void print_prcb();
34void print_intr_info();
35void print_ipnd_imsk();
36
37unsigned int Xint_2_Group_Map[8] = { 0, 1, 2, 5, 7, 3, 6, 4 };
38
39i960_isr_entry old_set_vector(                 /* returns old vector */
40  rtems_isr_entry func,                    /* isr routine */
41  unsigned int    xint,                    /* XINT number */
42  unsigned int    type                     /* RTEMS or RAW */
43)
44{
45  i960_isr_entry  *intr_tbl, *cached_intr_tbl;
46  i960_isr_entry   saved_intr;
47  unsigned int     vector, group, nibble;
48  unsigned int    *imap;
49
50  if ( xint > 7 )
51    exit( 0x80 );
52
53  cached_intr_tbl = (i960_isr_entry *) 0;
54  intr_tbl        = (i960_isr_entry *) Prcb->intr_tbl;
55  group           = Xint_2_Group_Map[xint];  /* remap XINT to group */
56  vector          = (group << 4) + 2;        /* direct vector num   */
57
58  if ( type )
59    rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr );
60  else {
61    saved_intr    = (i960_isr_entry) intr_tbl[ vector ];
62                                                   /* return old vector   */
63    intr_tbl[ vector + 1 ]   =                     /* normal vector table */
64    cached_intr_tbl[ group ] = (i960_isr_entry) func;    /* cached vector */
65  }
66
67  if       ( xint <= 3 ) imap = &Ctl_tbl->imap0;  /* updating IMAP0 */
68  else                   imap = &Ctl_tbl->imap1;  /* updating IMAP1 */
69  nibble = (xint % 4) * 4;
70  *imap &= ~(0xf << nibble);
71  *imap |= group << nibble;
72
73  Ctl_tbl->icon &= ~0x00000400;        /* enable global interrupts */
74  Ctl_tbl->icon |=  0x00004000;        /* fast sampling mode       */
75  switch ( xint ) {
76    case 0:   Ctl_tbl->icon |=  0x00000004;  break;
77    case 1:   Ctl_tbl->icon |=  0x00000008;  break;
78    case 2:   Ctl_tbl->icon &= ~0x00000010;  break;
79    case 4:   Ctl_tbl->icon &= ~0x00000040;  break;
80    case 5:   Ctl_tbl->icon |=  0x00000080;  break;
81    case 6:   Ctl_tbl->icon &= ~0x00000100;  break;
82    default:  exit( 0x81 );                  break; /* unsupported  */
83  }
84
85#if defined (i960ca)
86  if ( xint == 4 ) {                   /* reprogram MCON for SQSIO4 */
87    Ctl_tbl->mcon12 = 0x00002012;      /* MCON12 - 0xCxxxxxxx       */
88    Ctl_tbl->mcon13 = 0x00000000;      /* MCON13 - 0xDxxxxxxx       */
89    i960_reload_ctl_group( 5 );        /* update MCON12-MCON15      */
90  }
91#endif;
92
93  i960_unmask_intr( xint );            /* update IMSK               */
94  i960_reload_ctl_group( 1 );          /* update IMAP?/ICON         */
95  return( saved_intr );                /* return old vector         */
96}
97
98/* note:  this needs a little fix up work for XINTs */
99i960_isr_entry set_vector(                 /* returns old vector */
100  rtems_isr_entry func,                    /* isr routine */
101  unsigned int    vector,                  /* vector number */
102  unsigned int    type                     /* RTEMS or RAW */
103)
104{
105  i960_isr_entry  *intr_tbl, *cached_intr_tbl;
106  i960_isr_entry   saved_intr;
107  unsigned int     vect_idx, group, nibble;
108  unsigned int    *imap;
109  unsigned int    imask;
110  unsigned int    vec_idx;
111  volatile unsigned int *ipnd = (unsigned int *) IPND_ADDR;
112  volatile unsigned int *imsk = (unsigned int *) IMSK_ADDR;
113
114  cached_intr_tbl = (i960_isr_entry *) 0;
115  intr_tbl        = (i960_isr_entry *) Prcb->intr_tbl;
116
117  vec_idx = vector >> 4;
118  if ( type )
119  {
120    rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr );
121    return (saved_intr);
122  }
123  else {
124    saved_intr    = (i960_isr_entry) intr_tbl[ vect_idx ];
125                                                   /* return old vector   */
126    intr_tbl[ vector ]   =                     /* normal vector table */
127    cached_intr_tbl[ vec_idx ] = (i960_isr_entry) func;    /* cached vector */
128  }
129
130  if( vec_idx > 8)
131        imask = 0x1000 << (vec_idx - 9);
132  else
133        imask = 0x1 << (vec_idx - 1);
134    *ipnd &= ~(imask);
135    *imsk |= (imask);
136
137  return( saved_intr );                /* return old vector         */
138}
139
140i960_isr_entry set_tmr_vector(             /* returns old vector */
141  rtems_isr_entry func,                    /* isr routine */
142  unsigned int    vector,                  /* vector number */
143  unsigned int    tmrno                    /* which timer? */
144)
145{
146#if defined(i960ca)
147  saved_intr = NULL;
148#else
149  volatile i960_isr_entry  *intr_tbl;
150  volatile i960_isr_entry   saved_intr;
151  volatile unsigned int *imap2 = (unsigned int *) IMAP2_ADDR;
152  volatile unsigned int *isr = (unsigned int *) (4*(vector >> 4));
153
154  intr_tbl          = (i960_isr_entry *) Prcb->intr_tbl;
155  saved_intr        = (i960_isr_entry) intr_tbl[ vector ];
156  intr_tbl[vector]  = (((int) func) | 0x2); /* set IN_CACHE_IH flag */
157  *isr              = (unsigned int) func | 0x2;
158
159  if (tmrno) /* timer 1 */
160  {
161    *imap2 = (*imap2 & 0xff0fffff) | (((vector >> 4) & 0xf) << 20);
162  }
163  else /* timer 0 */
164  {
165    *imap2 = (*imap2 & 0xfff0ffff) | (((vector >> 4) & 0xf) << 16);
166  }
167
168#endif
169  return( saved_intr );                /* return old vector         */
170}
171
172void print_prcb()
173{
174  printf( "fault_table  =0x%p\n", Prcb->fault_tbl );
175  printf( "control_tbl  =0x%p\n", Prcb->control_tbl );
176  printf( "AC mask ov   =0x%x\n", Prcb->initial_ac );
177  printf( "fltconfig    =0x%x\n", Prcb->fault_config );
178  printf( "intr tbl     =0x%p\n", Prcb->intr_tbl );
179  printf( "systable     =0x%p\n", Prcb->sys_proc_tbl );
180  printf( "reserved     =0x%x\n", Prcb->reserved );
181  printf( "isr stk      =0x%p\n", Prcb->intr_stack );
182  printf( "ins cache    =0x%x\n", Prcb->ins_cache_cfg );
183  printf( "reg cache    =0x%x\n", Prcb->reg_cache_cfg );
184}
185
186void print_intr_info()
187{
188  printf( "prcb =0x%p\n",    Prcb );
189  printf( "ctl_tbl =0x%p\n", Ctl_tbl );
190  printf( "intr_tbl=0x%p\n", Prcb->intr_tbl );
191  printf( "IMAP0 = 0x%x\n",  Ctl_tbl->imap0 );
192  printf( "IMAP1 = 0x%x\n",  Ctl_tbl->imap1 );
193  print_ipnd_imsk();
194}
195
196void print_ipnd_imsk()
197{
198  printf(" IPEND = 0x%x\n", i960_pend_intrs() );
199  printf(" IMASK = 0x%x\n", i960_mask_intrs() );
200}
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