source: rtems/c/src/lib/libbsp/i960/rxgen960/startup/setvec.c @ 702c5f5

4.104.114.84.95
Last change on this file since 702c5f5 was 702c5f5, checked in by Joel Sherrill <joel.sherrill@…>, on 10/27/99 at 15:29:18

The rxgen960 BSP and i960 RPM support was submitted by Mark Bronson
<mark@…> of RAMIX.
  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*  set_vector
2 *
3 *  This routine attempts to perform all "generic" interrupt initialization
4 *  for the specified XINT line.
5 *
6 *  INPUT:
7 *    func  - interrupt handler entry point
8 *    xint  - external interrupt line
9 *    type  - 0 indicates raw hardware connect
10 *            1 indicates RTEMS interrupt connect
11 *
12 *  RETURNS:
13 *    address of previous interrupt handler
14 *
15 *  COPYRIGHT (c) 1989-1997.
16 *  On-Line Applications Research Corporation (OAR).
17 *  Copyright assigned to U.S. Government, 1994.
18 *
19 *  The license and distribution terms for this file may in
20 *  the file LICENSE in this distribution or at
21 *  http://www.OARcorp.com/rtems/license.html.
22 *
23 *  $Id$
24 */
25/*
26 * i960rp specific function added
27 */
28
29#include <rtems.h>
30#include <bsp.h>
31
32#include <stdio.h>
33
34void print_prcb();
35void print_intr_info();
36void print_ipnd_imsk();
37
38unsigned int Xint_2_Group_Map[8] = { 0, 1, 2, 5, 7, 3, 6, 4 };
39
40i960_isr_entry old_set_vector(                 /* returns old vector */
41  rtems_isr_entry func,                    /* isr routine */
42  unsigned int    xint,                    /* XINT number */
43  unsigned int    type                     /* RTEMS or RAW */
44)
45{
46  i960_isr_entry  *intr_tbl, *cached_intr_tbl;
47  i960_isr_entry   saved_intr;
48  unsigned int     vector, group, nibble;
49  unsigned int    *imap;
50
51  if ( xint > 7 )
52    exit( 0x80 );
53
54  cached_intr_tbl = (i960_isr_entry *) 0;
55  intr_tbl        = (i960_isr_entry *) Prcb->intr_tbl;
56  group           = Xint_2_Group_Map[xint];  /* remap XINT to group */
57  vector          = (group << 4) + 2;        /* direct vector num   */
58
59  if ( type )
60    rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr );
61  else {
62    saved_intr    = (i960_isr_entry) intr_tbl[ vector ];
63                                                   /* return old vector   */
64    intr_tbl[ vector + 1 ]   =                     /* normal vector table */
65    cached_intr_tbl[ group ] = (i960_isr_entry) func;    /* cached vector */
66  }
67
68  if       ( xint <= 3 ) imap = &Ctl_tbl->imap0;  /* updating IMAP0 */
69  else                   imap = &Ctl_tbl->imap1;  /* updating IMAP1 */
70  nibble = (xint % 4) * 4;
71  *imap &= ~(0xf << nibble);
72  *imap |= group << nibble;
73
74  Ctl_tbl->icon &= ~0x00000400;        /* enable global interrupts */
75  Ctl_tbl->icon |=  0x00004000;        /* fast sampling mode       */
76  switch ( xint ) {
77    case 0:   Ctl_tbl->icon |=  0x00000004;  break;
78    case 1:   Ctl_tbl->icon |=  0x00000008;  break;
79    case 2:   Ctl_tbl->icon &= ~0x00000010;  break;
80    case 4:   Ctl_tbl->icon &= ~0x00000040;  break;
81    case 5:   Ctl_tbl->icon |=  0x00000080;  break;
82    case 6:   Ctl_tbl->icon &= ~0x00000100;  break;
83    default:  exit( 0x81 );                  break; /* unsupported  */
84  }
85
86#if defined (i960ca)
87  if ( xint == 4 ) {                   /* reprogram MCON for SQSIO4 */
88    Ctl_tbl->mcon12 = 0x00002012;      /* MCON12 - 0xCxxxxxxx       */
89    Ctl_tbl->mcon13 = 0x00000000;      /* MCON13 - 0xDxxxxxxx       */
90    i960_reload_ctl_group( 5 );        /* update MCON12-MCON15      */
91  }
92#endif;
93
94  i960_unmask_intr( xint );            /* update IMSK               */
95  i960_reload_ctl_group( 1 );          /* update IMAP?/ICON         */
96  return( saved_intr );                /* return old vector         */
97}
98
99/* note:  this needs a little fix up work for XINTs */
100i960_isr_entry set_vector(                 /* returns old vector */
101  rtems_isr_entry func,                    /* isr routine */
102  unsigned int    vector,                  /* vector number */
103  unsigned int    type                     /* RTEMS or RAW */
104)
105{
106  i960_isr_entry  *intr_tbl, *cached_intr_tbl;
107  i960_isr_entry   saved_intr;
108  unsigned int     vect_idx, group, nibble;
109  unsigned int    *imap;
110  unsigned int    imask;
111  unsigned int    vec_idx;
112  volatile unsigned int *ipnd = (unsigned int *) IPND_ADDR;
113  volatile unsigned int *imsk = (unsigned int *) IMSK_ADDR;
114
115
116  cached_intr_tbl = (i960_isr_entry *) 0;
117  intr_tbl        = (i960_isr_entry *) Prcb->intr_tbl;
118
119  vec_idx = vector >> 4;
120  if ( type )
121  {
122    rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr );
123    return (saved_intr);
124  }
125  else {
126    saved_intr    = (i960_isr_entry) intr_tbl[ vect_idx ];
127                                                   /* return old vector   */
128    intr_tbl[ vector ]   =                     /* normal vector table */
129    cached_intr_tbl[ vec_idx ] = (i960_isr_entry) func;    /* cached vector */
130  }
131
132  if( vec_idx > 8)
133        imask = 0x1000 << (vec_idx - 9);
134  else
135        imask = 0x1 << (vec_idx - 1);
136    *ipnd &= ~(imask);
137    *imsk |= (imask);
138
139  return( saved_intr );                /* return old vector         */
140}
141
142i960_isr_entry set_tmr_vector(             /* returns old vector */
143  rtems_isr_entry func,                    /* isr routine */
144  unsigned int    vector,                  /* vector number */
145  unsigned int    tmrno                    /* which timer? */
146)
147{
148#if defined(i960ca)
149  saved_intr = NULL;
150#else
151  volatile i960_isr_entry  *intr_tbl;
152  volatile i960_isr_entry   saved_intr;
153  volatile unsigned int *imap2 = (unsigned int *) IMAP2_ADDR;
154  volatile unsigned int *isr = (unsigned int *) (4*(vector >> 4));
155
156  intr_tbl          = (i960_isr_entry *) Prcb->intr_tbl;
157  saved_intr        = (i960_isr_entry) intr_tbl[ vector ];
158  intr_tbl[vector]  = (((int) func) | 0x2); /* set IN_CACHE_IH flag */
159  *isr              = (unsigned int) func | 0x2;
160
161  if (tmrno) /* timer 1 */
162  {
163    *imap2 = (*imap2 & 0xff0fffff) | (((vector >> 4) & 0xf) << 20);
164  }
165  else /* timer 0 */
166  {
167    *imap2 = (*imap2 & 0xfff0ffff) | (((vector >> 4) & 0xf) << 16);
168  }
169
170#endif
171  return( saved_intr );                /* return old vector         */
172}
173
174void print_prcb()
175{
176  printf( "fault_table  =0x%p\n", Prcb->fault_tbl );
177  printf( "control_tbl  =0x%p\n", Prcb->control_tbl );
178  printf( "AC mask ov   =0x%x\n", Prcb->initial_ac );
179  printf( "fltconfig    =0x%x\n", Prcb->fault_config );
180  printf( "intr tbl     =0x%p\n", Prcb->intr_tbl );
181  printf( "systable     =0x%p\n", Prcb->sys_proc_tbl );
182  printf( "reserved     =0x%x\n", Prcb->reserved );
183  printf( "isr stk      =0x%p\n", Prcb->intr_stack );
184  printf( "ins cache    =0x%x\n", Prcb->ins_cache_cfg );
185  printf( "reg cache    =0x%x\n", Prcb->reg_cache_cfg );
186}
187
188void print_intr_info()
189{
190  printf( "prcb =0x%p\n",    Prcb );
191  printf( "ctl_tbl =0x%p\n", Ctl_tbl );
192  printf( "intr_tbl=0x%p\n", Prcb->intr_tbl );
193  printf( "IMAP0 = 0x%x\n",  Ctl_tbl->imap0 );
194  printf( "IMAP1 = 0x%x\n",  Ctl_tbl->imap1 );
195  print_ipnd_imsk();
196}
197
198void print_ipnd_imsk()
199{
200  printf(" IPEND = 0x%x\n", i960_pend_intrs() );
201  printf(" IMASK = 0x%x\n", i960_mask_intrs() );
202}
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