1 | /* set_vector |
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2 | * |
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3 | * This routine attempts to perform all "generic" interrupt initialization |
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4 | * for the specified XINT line. |
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5 | * |
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6 | * INPUT: |
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7 | * func - interrupt handler entry point |
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8 | * xint - external interrupt line |
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9 | * type - 0 indicates raw hardware connect |
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10 | * 1 indicates RTEMS interrupt connect |
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11 | * |
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12 | * RETURNS: |
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13 | * address of previous interrupt handler |
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14 | * |
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15 | * COPYRIGHT (c) 1989-1997. |
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16 | * On-Line Applications Research Corporation (OAR). |
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17 | * Copyright assigned to U.S. Government, 1994. |
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18 | * |
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19 | * The license and distribution terms for this file may in |
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20 | * the file LICENSE in this distribution or at |
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21 | * http://www.OARcorp.com/rtems/license.html. |
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22 | * |
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23 | * $Id$ |
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24 | */ |
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25 | /* |
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26 | * i960rp specific function added |
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27 | */ |
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28 | |
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29 | #include <rtems.h> |
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30 | #include <bsp.h> |
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31 | |
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32 | #include <stdio.h> |
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33 | |
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34 | void print_prcb(); |
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35 | void print_intr_info(); |
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36 | void print_ipnd_imsk(); |
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37 | |
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38 | unsigned int Xint_2_Group_Map[8] = { 0, 1, 2, 5, 7, 3, 6, 4 }; |
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39 | |
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40 | i960_isr_entry old_set_vector( /* returns old vector */ |
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41 | rtems_isr_entry func, /* isr routine */ |
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42 | unsigned int xint, /* XINT number */ |
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43 | unsigned int type /* RTEMS or RAW */ |
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44 | ) |
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45 | { |
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46 | i960_isr_entry *intr_tbl, *cached_intr_tbl; |
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47 | i960_isr_entry saved_intr; |
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48 | unsigned int vector, group, nibble; |
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49 | unsigned int *imap; |
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50 | |
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51 | if ( xint > 7 ) |
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52 | exit( 0x80 ); |
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53 | |
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54 | cached_intr_tbl = (i960_isr_entry *) 0; |
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55 | intr_tbl = (i960_isr_entry *) Prcb->intr_tbl; |
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56 | group = Xint_2_Group_Map[xint]; /* remap XINT to group */ |
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57 | vector = (group << 4) + 2; /* direct vector num */ |
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58 | |
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59 | if ( type ) |
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60 | rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr ); |
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61 | else { |
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62 | saved_intr = (i960_isr_entry) intr_tbl[ vector ]; |
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63 | /* return old vector */ |
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64 | intr_tbl[ vector + 1 ] = /* normal vector table */ |
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65 | cached_intr_tbl[ group ] = (i960_isr_entry) func; /* cached vector */ |
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66 | } |
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67 | |
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68 | if ( xint <= 3 ) imap = &Ctl_tbl->imap0; /* updating IMAP0 */ |
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69 | else imap = &Ctl_tbl->imap1; /* updating IMAP1 */ |
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70 | nibble = (xint % 4) * 4; |
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71 | *imap &= ~(0xf << nibble); |
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72 | *imap |= group << nibble; |
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73 | |
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74 | Ctl_tbl->icon &= ~0x00000400; /* enable global interrupts */ |
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75 | Ctl_tbl->icon |= 0x00004000; /* fast sampling mode */ |
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76 | switch ( xint ) { |
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77 | case 0: Ctl_tbl->icon |= 0x00000004; break; |
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78 | case 1: Ctl_tbl->icon |= 0x00000008; break; |
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79 | case 2: Ctl_tbl->icon &= ~0x00000010; break; |
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80 | case 4: Ctl_tbl->icon &= ~0x00000040; break; |
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81 | case 5: Ctl_tbl->icon |= 0x00000080; break; |
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82 | case 6: Ctl_tbl->icon &= ~0x00000100; break; |
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83 | default: exit( 0x81 ); break; /* unsupported */ |
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84 | } |
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85 | |
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86 | #if defined (i960ca) |
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87 | if ( xint == 4 ) { /* reprogram MCON for SQSIO4 */ |
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88 | Ctl_tbl->mcon12 = 0x00002012; /* MCON12 - 0xCxxxxxxx */ |
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89 | Ctl_tbl->mcon13 = 0x00000000; /* MCON13 - 0xDxxxxxxx */ |
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90 | i960_reload_ctl_group( 5 ); /* update MCON12-MCON15 */ |
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91 | } |
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92 | #endif; |
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93 | |
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94 | i960_unmask_intr( xint ); /* update IMSK */ |
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95 | i960_reload_ctl_group( 1 ); /* update IMAP?/ICON */ |
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96 | return( saved_intr ); /* return old vector */ |
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97 | } |
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98 | |
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99 | /* note: this needs a little fix up work for XINTs */ |
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100 | i960_isr_entry set_vector( /* returns old vector */ |
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101 | rtems_isr_entry func, /* isr routine */ |
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102 | unsigned int vector, /* vector number */ |
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103 | unsigned int type /* RTEMS or RAW */ |
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104 | ) |
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105 | { |
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106 | i960_isr_entry *intr_tbl, *cached_intr_tbl; |
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107 | i960_isr_entry saved_intr; |
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108 | unsigned int vect_idx, group, nibble; |
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109 | unsigned int *imap; |
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110 | unsigned int imask; |
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111 | unsigned int vec_idx; |
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112 | volatile unsigned int *ipnd = (unsigned int *) IPND_ADDR; |
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113 | volatile unsigned int *imsk = (unsigned int *) IMSK_ADDR; |
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114 | |
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115 | |
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116 | cached_intr_tbl = (i960_isr_entry *) 0; |
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117 | intr_tbl = (i960_isr_entry *) Prcb->intr_tbl; |
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118 | |
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119 | vec_idx = vector >> 4; |
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120 | if ( type ) |
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121 | { |
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122 | rtems_interrupt_catch( func, vector, (rtems_isr_entry *) &saved_intr ); |
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123 | return (saved_intr); |
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124 | } |
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125 | else { |
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126 | saved_intr = (i960_isr_entry) intr_tbl[ vect_idx ]; |
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127 | /* return old vector */ |
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128 | intr_tbl[ vector ] = /* normal vector table */ |
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129 | cached_intr_tbl[ vec_idx ] = (i960_isr_entry) func; /* cached vector */ |
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130 | } |
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131 | |
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132 | if( vec_idx > 8) |
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133 | imask = 0x1000 << (vec_idx - 9); |
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134 | else |
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135 | imask = 0x1 << (vec_idx - 1); |
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136 | *ipnd &= ~(imask); |
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137 | *imsk |= (imask); |
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138 | |
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139 | return( saved_intr ); /* return old vector */ |
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140 | } |
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141 | |
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142 | i960_isr_entry set_tmr_vector( /* returns old vector */ |
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143 | rtems_isr_entry func, /* isr routine */ |
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144 | unsigned int vector, /* vector number */ |
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145 | unsigned int tmrno /* which timer? */ |
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146 | ) |
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147 | { |
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148 | #if defined(i960ca) |
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149 | saved_intr = NULL; |
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150 | #else |
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151 | volatile i960_isr_entry *intr_tbl; |
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152 | volatile i960_isr_entry saved_intr; |
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153 | volatile unsigned int *imap2 = (unsigned int *) IMAP2_ADDR; |
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154 | volatile unsigned int *isr = (unsigned int *) (4*(vector >> 4)); |
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155 | |
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156 | intr_tbl = (i960_isr_entry *) Prcb->intr_tbl; |
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157 | saved_intr = (i960_isr_entry) intr_tbl[ vector ]; |
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158 | intr_tbl[vector] = (((int) func) | 0x2); /* set IN_CACHE_IH flag */ |
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159 | *isr = (unsigned int) func | 0x2; |
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160 | |
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161 | if (tmrno) /* timer 1 */ |
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162 | { |
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163 | *imap2 = (*imap2 & 0xff0fffff) | (((vector >> 4) & 0xf) << 20); |
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164 | } |
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165 | else /* timer 0 */ |
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166 | { |
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167 | *imap2 = (*imap2 & 0xfff0ffff) | (((vector >> 4) & 0xf) << 16); |
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168 | } |
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169 | |
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170 | #endif |
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171 | return( saved_intr ); /* return old vector */ |
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172 | } |
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173 | |
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174 | void print_prcb() |
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175 | { |
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176 | printf( "fault_table =0x%p\n", Prcb->fault_tbl ); |
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177 | printf( "control_tbl =0x%p\n", Prcb->control_tbl ); |
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178 | printf( "AC mask ov =0x%x\n", Prcb->initial_ac ); |
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179 | printf( "fltconfig =0x%x\n", Prcb->fault_config ); |
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180 | printf( "intr tbl =0x%p\n", Prcb->intr_tbl ); |
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181 | printf( "systable =0x%p\n", Prcb->sys_proc_tbl ); |
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182 | printf( "reserved =0x%x\n", Prcb->reserved ); |
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183 | printf( "isr stk =0x%p\n", Prcb->intr_stack ); |
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184 | printf( "ins cache =0x%x\n", Prcb->ins_cache_cfg ); |
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185 | printf( "reg cache =0x%x\n", Prcb->reg_cache_cfg ); |
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186 | } |
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187 | |
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188 | void print_intr_info() |
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189 | { |
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190 | printf( "prcb =0x%p\n", Prcb ); |
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191 | printf( "ctl_tbl =0x%p\n", Ctl_tbl ); |
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192 | printf( "intr_tbl=0x%p\n", Prcb->intr_tbl ); |
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193 | printf( "IMAP0 = 0x%x\n", Ctl_tbl->imap0 ); |
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194 | printf( "IMAP1 = 0x%x\n", Ctl_tbl->imap1 ); |
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195 | print_ipnd_imsk(); |
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196 | } |
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197 | |
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198 | void print_ipnd_imsk() |
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199 | { |
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200 | printf(" IPEND = 0x%x\n", i960_pend_intrs() ); |
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201 | printf(" IMASK = 0x%x\n", i960_mask_intrs() ); |
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202 | } |
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