source: rtems/c/src/lib/libbsp/i960/rxgen960/startup/rom_prcb.c @ c8f3e82

Last change on this file since c8f3e82 was 2ea8df3, checked in by Joel Sherrill <joel.sherrill@…>, on 10/27/99 at 16:27:34

Added CVS Ids and a basic header. More header cleanup needed.

  • Property mode set to 100644
File size: 1.8 KB
Line 
1/*-------------------------------------*/
2/* prcb.c                              */
3/* Last change : 11.10.94              */
4/*-------------------------------------*/
5/*
6 *  $Id$
7 */
8
9#include "flttbl.h"
10#include "cntrltbl.h"
11#include "intrtbl.h"
12#include "systbl.h"
13#include "prcb.h"
14/*-------------------------------------*/
15  /* RAM based PRocess Control Block 
16   */     
17#ifdef DBPRECISE_FAULTS
18#define AC                      (INT_OVFL_DISABLE | PRECISE_FLTS)
19#else
20#define AC                      (INT_OVFL_DISABLE | IMPRECISE_FLTS)
21#endif
22
23 /* Initial Fault Configuration Word Image.
24   * As to this 1, I don't know why but without it
25   * fault hanlder wouldn't be invoked.
26   */
27#define FAULT_CONFIG            (UNLGND_FAULT_DISABLE | 1)
28extern SystemTbl nulsystemTbl;
29
30  /* Initial Instruction Cache Configuration Word Image.
31   */
32#ifdef DBCACHE_OFF
33#define INST_CACHE_CONFIG       (INST_CACHE_DISABLE)
34#else
35#define INST_CACHE_CONFIG       (INST_CACHE_ENABLE)
36#endif
37
38  /* Initial Register Cache Configuration Word Image.
39   */
40#define REG_CACHE_CONFIG        0x200
41
42
43struct PRCB rom_prcb = {
44  & faultTbl[0],                        /* Fault Table Base */   
45  & rom_controlTbl[0],                  /* Control Table Base */   
46  AC,                                   /* AC */
47  FAULT_CONFIG,                         /* Fault Configuration Word */
48  & interruptTbl,                       /* Interrupt Table Base */
49  & nulsystemTbl,                       /* System Procedure Table Base */   
50  0,                                    /* Reserved */ 
51  & intStackPtr[0],                     /* Interrupt Stack Pointer */
52  INST_CACHE_CONFIG,                    /* Instruction Cache Config */
53  REG_CACHE_CONFIG,                     /* Reg Cache Config */
54}; 
55
56/*-------------*/
57/* End of file */
58/*-------------*/
59
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