source: rtems/c/src/lib/libbsp/i960/rxgen960/startup/cntrltbl.h @ 3299388d

4.104.114.84.95
Last change on this file since 3299388d was 2ea8df3, checked in by Joel Sherrill <joel.sherrill@…>, on 10/27/99 at 16:27:34

Added CVS Ids and a basic header. More header cleanup needed.
  • Property mode set to 100644
File size: 933 bytes
Line 
1/*-------------------------------------*/
2/* cntrltbl.h                          */
3/* Last change : 11. 1.95              */
4/*-------------------------------------*/
5/*
6 *  $Id$
7 */
8
9#ifndef _CNTRLTBL_H_
10#define _CNTRLTBL_H_
11
12  /* Control Table Entry.   
13   */
14typedef unsigned int ControlTblEntry;
15  /* Control Table itself.
16   */
17extern ControlTblEntry controlTbl[];
18extern ControlTblEntry rom_controlTbl[];
19
20  /* Interrupt Registers Initial.
21   */     
22#define IPB0            0
23#define IPB1            0
24#define DAB0            0 
25#define DAB1            0 
26
27#define I_DISABLE       (0x1<<10)
28#define I_ENABLE        0
29
30#define MSK_UNCHNG      0
31#define MSK_CLEAR  (0x1<<11)
32
33#define VECTOR_CACHE    (0x1<<13)
34
35
36
37  /* BreakPoint Control Register Initial.
38   */
39#define BPCON           0 
40  /* Bus Controller Mode Comstants.
41  */
42#define CONF_TBL_VALID  0x1
43#define PROTECT_RAM     0x2 
44#define PROTECT_RAM_SUP 0x4
45
46
47
48#endif   
49/*-------------*/
50/* End of file */
51/*-------------*/
52
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