4.104.114.84.95
Last change
on this file since 0d6f0b4 was
ae7325bd,
checked in by Joel Sherrill <joel.sherrill@…>, on 10/27/99 at 17:25:53
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rxgen960 now compiles -- may not link.
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-
Property mode set to
100644
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File size:
971 bytes
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1 | /*
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2 | * PMC901 specific configuration values
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3 | *
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4 | * $Id$
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5 | */
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6 |
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7 | #ifndef __PMC901_CONFIG__
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8 | #define __PMC901_CONFIG__
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9 | /* The following define the PMC960 bus regions */
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10 | /* Bus configuration */
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11 | #define RP_CONFIG_REGS I960RP_BUS_WIDTH(32)
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12 | #define FLASH I960RP_BUS_WIDTH(8)
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13 | #define DRAM I960RP_BUS_WIDTH(32)
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14 | #define UART_LED I960RP_BUS_WIDTH(8)
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15 | #define DEFAULT I960RP_BUS_WIDTH(32)
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16 |
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17 | /* Region Configuration */
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18 | #define REGION_0_CONFIG RP_CONFIG_REGS
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19 | #define REGION_2_CONFIG DEFAULT
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20 | #define REGION_4_CONFIG DEFAULT
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21 | #define REGION_6_CONFIG DEFAULT
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22 | #define REGION_8_CONFIG DEFAULT
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23 | #define REGION_A_CONFIG DRAM
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24 | #define REGION_C_CONFIG UART_LED
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25 | #define REGION_E_CONFIG DEFAULT
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26 | /* #define REGION_BOOT_CONFIG (FLASH | I960RP_ZBYTE_ORDER)*/
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27 | #define REGION_BOOT_CONFIG (DRAM)
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28 |
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29 | /* #define DRAM_BASE 0xfed00000 */
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30 | #define DRAM_BASE 0xa0000000
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31 |
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32 | #endif
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