[702c5f5] | 1 | /* Clock_init() |
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| 2 | * |
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| 3 | * This routine initializes the i960RP onboard timer |
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| 4 | * The tick frequency is 1 millisecond; assuming 33MHz core |
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| 5 | * |
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| 6 | * Input parameters: NONE |
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| 7 | * |
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| 8 | * Output parameters: NONE |
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| 9 | * |
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| 10 | * COPYRIGHT (c) 1989-1997. |
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| 11 | * RAMiX Inc 1999 |
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| 12 | * On-Line Applications Research Corporation (OAR). |
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| 13 | * Copyright assigned to U.S. Government, 1994. |
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| 14 | * |
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| 15 | * The license and distribution terms for this file may in |
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| 16 | * the file LICENSE in this distribution or at |
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| 17 | * http://www.OARcorp.com/rtems/license.html. |
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| 18 | * |
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| 19 | * $Id$ |
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| 20 | */ |
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| 21 | |
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| 22 | #include <stdlib.h> |
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| 23 | |
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| 24 | #include <bsp.h> |
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| 25 | #include <i960RP.h> |
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| 26 | #include <rtems/libio.h> |
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| 27 | |
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| 28 | #define CLOCK_VECTOR 0x92 |
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| 29 | |
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| 30 | rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ |
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| 31 | rtems_unsigned32 Reload_Clock_isrs; |
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| 32 | |
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| 33 | i960_isr_entry Old_ticker; |
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| 34 | rtems_unsigned32 Clock_driver_ticks; |
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| 35 | /* ticks since initialization */ |
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| 36 | unsigned int clock_isr_global[16]; /* place to store global regs */ |
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| 37 | |
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| 38 | void Clock_exit( void ); |
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| 39 | |
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| 40 | /* |
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| 41 | * These are set by clock driver during its init |
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| 42 | */ |
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| 43 | |
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| 44 | rtems_device_major_number rtems_clock_major = ~0; |
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| 45 | rtems_device_minor_number rtems_clock_minor; |
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| 46 | |
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| 47 | /* this is later in the file to avoid it being inlined */ |
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| 48 | rtems_isr Clock_isr( rtems_vector_number vector ); |
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| 49 | |
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| 50 | void Install_clock( |
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| 51 | rtems_isr_entry clock_isr |
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| 52 | ) |
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| 53 | { |
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| 54 | volatile unsigned int *tmr0 = (unsigned int *) TMR0_ADDR; |
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| 55 | volatile unsigned int *trr0 = (unsigned int *) TRR0_ADDR; |
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| 56 | volatile unsigned int *tcr0 = (unsigned int *) TCR0_ADDR; |
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| 57 | volatile unsigned int *icon = (unsigned int *) ICON_ADDR; |
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| 58 | volatile unsigned int *imap2 = (unsigned int *) IMAP2_ADDR; |
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| 59 | volatile unsigned int *ipnd = (unsigned int *) IPND_ADDR; |
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| 60 | volatile unsigned int *imsk = (unsigned int *) IMSK_ADDR; |
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| 61 | void clockHandler(); |
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| 62 | |
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| 63 | |
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| 64 | Clock_driver_ticks = 0; |
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| 65 | Reload_Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; |
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| 66 | Clock_isrs = Reload_Clock_isrs; |
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| 67 | |
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| 68 | /* Not for our case |
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| 69 | if ( BSP_Configuration.ticks_per_timeslice ) { |
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| 70 | *icon = 0x6000; |
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| 71 | |
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| 72 | Old_ticker = set_vector( (((unsigned int) clock_isr) | 0x2), CLOCK_VECTOR, 1 ); |
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| 73 | */ |
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| 74 | #define BUS_CLOCK_1 0 |
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| 75 | #define TMR_WRITE_CNTL 8 |
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| 76 | #define TMR_AUTO_RELOAD 4 |
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| 77 | #define TMR_ENABLE 2 |
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| 78 | #define TMR_TERM_CNT_STAT 1 |
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| 79 | |
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| 80 | Old_ticker = set_vector( (((unsigned int) clock_isr) | 0x2), CLOCK_VECTOR, 1 ); |
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| 81 | /* |
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| 82 | *(unsigned int *)(CLOCK_VECTOR >>2) = (unsigned int )clockHandler; |
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| 83 | */ |
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| 84 | |
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| 85 | /* initialize the i960RP timer 0 here */ |
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| 86 | |
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| 87 | /* set the timer countdown (Assume 33MHz operation) */ |
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| 88 | *trr0 = 30 * BSP_Configuration.microseconds_per_tick ; |
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| 89 | *tcr0 = 30 * BSP_Configuration.microseconds_per_tick ; |
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| 90 | /* |
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| 91 | kkprintf("Load the timers with %x\n", 30 * BSP_Configuration.microseconds_per_tick / Reload_Clock_isrs); |
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| 92 | */ |
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| 93 | |
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| 94 | *tmr0 = BUS_CLOCK_1 | TMR_AUTO_RELOAD | TMR_ENABLE; |
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| 95 | /* Unmask the interrupts */ |
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| 96 | *ipnd &= ~(1 << 12); |
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| 97 | *imsk |= 1 << 12; |
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| 98 | |
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| 99 | } |
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| 100 | |
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| 101 | void Clock_exit() |
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| 102 | { |
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| 103 | volatile unsigned int *tmr0 = (unsigned int *) TMR0_ADDR; |
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| 104 | |
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| 105 | if ( BSP_Configuration.ticks_per_timeslice ) { |
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| 106 | /* shut down the timer */ |
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| 107 | *tmr0 = *tmr0 & ~TMR_ENABLE; |
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| 108 | |
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| 109 | i960_mask_intr( 12 ); |
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| 110 | /* do not restore old vector */ |
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| 111 | } |
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| 112 | } |
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| 113 | |
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| 114 | rtems_device_driver Clock_initialize( |
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| 115 | rtems_device_major_number major, |
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| 116 | rtems_device_minor_number minor, |
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| 117 | void *pargp |
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| 118 | ) |
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| 119 | { |
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| 120 | Install_clock( Clock_isr ); |
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| 121 | |
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| 122 | atexit( Clock_exit ); |
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| 123 | |
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| 124 | /* |
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| 125 | * make major/minor avail to others such as shared memory driver |
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| 126 | */ |
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| 127 | |
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| 128 | rtems_clock_major = major; |
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| 129 | rtems_clock_minor = minor; |
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| 130 | |
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| 131 | return RTEMS_SUCCESSFUL; |
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| 132 | } |
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| 133 | |
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| 134 | rtems_device_driver Clock_control( |
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| 135 | rtems_device_major_number major, |
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| 136 | rtems_device_minor_number minor, |
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| 137 | void *pargp |
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| 138 | ) |
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| 139 | { |
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| 140 | rtems_unsigned32 isrlevel; |
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| 141 | rtems_libio_ioctl_args_t *args = pargp; |
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| 142 | |
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| 143 | if (args == 0) |
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| 144 | goto done; |
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| 145 | |
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| 146 | /* |
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| 147 | * This is hokey, but until we get a defined interface |
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| 148 | * to do this, it will just be this simple... |
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| 149 | */ |
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| 150 | |
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| 151 | if (args->command == rtems_build_name('I', 'S', 'R', ' ')) |
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| 152 | { |
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| 153 | Clock_isr(CLOCK_VECTOR); |
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| 154 | } |
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| 155 | else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) |
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| 156 | { |
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| 157 | rtems_interrupt_disable( isrlevel ); |
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| 158 | (void) set_tmr_vector( args->buffer, CLOCK_VECTOR, 0 ); |
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| 159 | rtems_interrupt_enable( isrlevel ); |
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| 160 | } |
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| 161 | |
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| 162 | done: |
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| 163 | return RTEMS_SUCCESSFUL; |
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| 164 | } |
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| 165 | |
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| 166 | rtems_isr Clock_isr( |
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| 167 | rtems_vector_number vector |
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| 168 | ) |
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| 169 | { |
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| 170 | /* enable_tracing(); */ |
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| 171 | #ifdef NOTMB |
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| 172 | if ( Clock_isrs == 1 ) { |
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| 173 | rtems_clock_tick(); |
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| 174 | Clock_isrs = Reload_Clock_isrs; |
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| 175 | } |
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| 176 | else |
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| 177 | { |
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| 178 | Clock_isrs -= 1; |
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| 179 | } |
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| 180 | #else |
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| 181 | *(int *)(0xfed00000) += 1; |
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| 182 | rtems_clock_tick(); |
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| 183 | #endif |
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| 184 | |
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| 185 | i960_clear_intr( 12 ); |
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| 186 | } |
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| 187 | |
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