[ac7d5ef0] | 1 | /* timer_isr() |
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| 2 | * |
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| 3 | * This routine initializes the Z8536 timer on the SQSIO4 SQUALL |
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| 4 | * board for the CVME961 board. The timer is setup to provide a |
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| 5 | * tick every 0x10000 / 2 milliseconds. This is used to time |
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| 6 | * executing code. |
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| 7 | * |
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| 8 | * Input parameters: NONE |
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| 9 | * |
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| 10 | * Output parameters: NONE |
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| 11 | * |
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| 12 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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| 13 | * On-Line Applications Research Corporation (OAR). |
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| 14 | * All rights assigned to U.S. Government, 1994. |
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| 15 | * |
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| 16 | * This material may be reproduced by or for the U.S. Government pursuant |
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| 17 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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| 18 | * notice must appear in all copies of this file and its derivatives. |
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| 19 | * |
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| 20 | * $Id$ |
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| 21 | */ |
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| 22 | |
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| 23 | #include "asm.h" |
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| 24 | |
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| 25 | .set PORT_A, 0xc00000a8 # port A |
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| 26 | .set PORT_B, 0xc00000a4 # port B |
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| 27 | .set PORT_C, 0xc00000a0 # port C |
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| 28 | .set CTL_PORT, 0xc00000ac # control port |
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| 29 | |
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| 30 | .set T1CSR, 0x0a # T1 command/status reg |
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| 31 | .set RELOAD, 0x24 # clr IP & IUS,allow countdown |
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| 32 | |
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| 33 | PUBLIC(_timerisr) |
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| 34 | SYM (_timerisr): |
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| 35 | #ldconst 1,r4 |
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| 36 | #modpc 0,r4,r4 # enable tracing |
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| 37 | |
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| 38 | ld _Ttimer_val,r6 # r6 = test timer |
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| 39 | |
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| 40 | ldconst T1CSR,r4 # r4 = T1 control status reg |
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| 41 | stob r4,CTL_PORT # select T1CSR |
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| 42 | ldconst RELOAD,r5 # r5 = reset value |
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| 43 | stob r5,CTL_PORT # reset countdown |
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| 44 | addo 1,r6,r6 |
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| 45 | st r6,_Ttimer_val # increment test timer |
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| 46 | loop_til_cleared: |
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| 47 | clrbit 4,sf0,sf0 |
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| 48 | bbs 4,sf0,loop_til_cleared |
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| 49 | leaf: ret |
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| 50 | |
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| 51 | .leafproc _flush_reg, flush_reg.lf |
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| 52 | .globl _flush_reg, flush_reg.lf |
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| 53 | _flush_reg: |
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| 54 | lda leaf,g14 # g14 = exit address |
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| 55 | flush_reg.lf: |
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| 56 | flushreg |
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| 57 | mov g14,g0 # g0 = exit address |
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| 58 | ldconst 0,g14 # set g14 for non-leaf |
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| 59 | bx (g0) |
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