source: rtems/c/src/lib/libbsp/i960/cvme961/shmsupp/mpisr.c @ ac7d5ef0

4.104.114.84.95
Last change on this file since ac7d5ef0 was ac7d5ef0, checked in by Joel Sherrill <joel.sherrill@…>, on 05/11/95 at 17:39:37

Initial revision

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/*  Shm_isr_cvme961()
2 *
3 *  NOTE: This routine is not used when in polling mode.  Either
4 *        this routine OR Shm_clockisr is used in a particular system.
5 *
6 *        There must be sufficient time after the IACK (read at
7 *        0xb600000x) for the VIC068 to clear the interrupt request
8 *        before the interrupt request is cleared from IPND (sf0).
9 *
10 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
11 *  On-Line Applications Research Corporation (OAR).
12 *  All rights assigned to U.S. Government, 1994.
13 *
14 *  This material may be reproduced by or for the U.S. Government pursuant
15 *  to the copyright license under the clause at DFARS 252.227-7013.  This
16 *  notice must appear in all copies of this file and its derivatives.
17 *
18 *  $Id$
19 */
20
21#include <rtems.h>
22#include <bsp.h>
23#include "shm.h"
24
25rtems_isr Shm_isr_cvme961(
26  rtems_vector_number vector
27)
28{
29  rtems_unsigned32 vic_vector;
30
31  /* enable_tracing(); */
32  vic_vector = (*(volatile rtems_unsigned8 *)0xb6000007);
33                                           /* reset intr by reading */
34                                           /*   vector at IPL=3 */
35  Shm_Interrupt_count += 1;
36  rtems_multiprocessing_announce();
37  (*(volatile rtems_unsigned8 *)0xa000005f) = 0; /* clear ICMS0 */
38  i960_clear_intr( 6 );
39
40}
41
42/*  void _Shm_setvec( )
43 *
44 *  This driver routine sets the SHM interrupt vector to point to the
45 *  driver's SHM interrupt service routine.
46 *
47 *  NOTE: See pp. 21-22, 36-39 of the CVME961 Manual for more info.
48 *
49 *  Input parameters:  NONE
50 *
51 *  Output parameters: NONE
52 */
53
54void Shm_setvec()
55{
56  rtems_unsigned32 isrlevel;
57
58  rtems_interrupt_disable( isrlevel );
59                                        /* set SQSIO4 CTL REG for */
60                                        /*   VME slave address */
61    (*(rtems_unsigned8 *)0xc00000b0) =
62      (Shm_RTEMS_MP_Configuration->node - 1) | 0x10;
63    set_vector( Shm_isr_cvme961, 6, 1 );
64                                        /* set ICMS Bector Base Register */
65    (*(rtems_unsigned8 *)0xa0000053) = 0x60;  /* XINT6 vector is 0x62 */
66                                        /* set  ICMS Intr Control Reg */
67    (*(rtems_unsigned8 *)0xa0000047) = 0xeb;  /* ICMS0 enabled, IPL=0 */
68    (*(rtems_unsigned8 *)0xa000005f) = 0;     /* clear ICMS0 */
69  rtems_interrupt_enable( isrlevel );
70}
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