source: rtems/c/src/lib/libbsp/i960/cvme961/include/bsp.h @ ac7d5ef0

4.104.114.84.95
Last change on this file since ac7d5ef0 was ac7d5ef0, checked in by Joel Sherrill <joel.sherrill@…>, on 05/11/95 at 17:39:37

Initial revision

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File size: 2.9 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains some definitions specific to the
4 *  Cyclone CVME960 and CVME961 boards.  These boards are the
5 *  same except the 960 uses SRAM and the 961 DRAM.
6 *
7 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
8 *  On-Line Applications Research Corporation (OAR).
9 *  All rights assigned to U.S. Government, 1994.
10 *
11 *  This material may be reproduced by or for the U.S. Government pursuant
12 *  to the copyright license under the clause at DFARS 252.227-7013.  This
13 *  notice must appear in all copies of this file and its derivatives.
14 *
15 *  $Id$
16 */
17
18#ifndef __CVME961_h
19#define __CVME961_h
20
21#ifdef __cplusplus
22extern "C" {
23#endif
24
25#include <rtems.h>
26#include <iosupp.h>
27
28/*
29 *  Define the time limits for RTEMS Test Suite test durations.
30 *  Long test and short test duration limits are provided.  These
31 *  values are in seconds and need to be converted to ticks for the
32 *  application.
33 *
34 */
35
36#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
37#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
38
39/*
40 *  Define the interrupt mechanism for Time Test 27
41 *
42 *  NOTE: Following are for i960CA and are board independent
43 *
44 */
45
46#define MUST_WAIT_FOR_INTERRUPT 0
47
48#define Install_tm27_vector( handler ) set_vector( (handler), 6, 1 )
49
50#define Cause_tm27_intr()  i960_cause_intr( 0x62 )
51
52#define Clear_tm27_intr()  i960_clear_intr( 6 )
53
54#define Lower_tm27_intr()
55
56/*
57 *  Simple spin delay in microsecond units for device drivers.
58 *  This is very dependent on the clock speed of the target.
59 */
60
61#define delay( microseconds ) \
62  { register rtems_unsigned32 _delay=(microseconds); \
63    register rtems_unsigned32 _tmp; \
64    asm volatile( "0: \
65                     remo      3,31,%0 ; \
66                     cmpo      0,%0 ; \
67                     subo      1,%1,%1 ; \
68                     cmpobne.t 0,%1,0b " \
69                  : "=d" (_tmp), "=d" (_delay) \
70                  : "0"  (_tmp), "1"  (_delay) ); \
71  }
72
73/* Constants */
74
75#define RAM_START 0
76#define RAM_END   0x100000
77
78/* NINDY console I/O requests:
79 *   CO sends a single character to stdout,
80 *   CI reads one.
81 */
82
83#define NINDY_INPUT   0
84#define NINDY_OUTPUT  1
85
86/*
87 *  get_prcb
88 *
89 *  Returns the PRCB pointer.
90 */
91
92static inline i960ca_PRCB *get_prcb( void )
93{
94  register i960ca_PRCB *_prcb = 0;
95
96  asm volatile( "calls 5; \
97                 mov   g0,%0" \
98                 : "=d" (_prcb) \
99                 : "0" (_prcb) );
100  return ( _prcb );
101}
102
103#ifdef C961_INIT
104#undef BSP_EXTERN
105#define BSP_EXTERN
106#else
107#undef BSP_EXTERN
108#define BSP_EXTERN extern
109#endif
110
111/* miscellaneous stuff assumed to exist */
112
113extern rtems_configuration_table BSP_Configuration;
114
115BSP_EXTERN i960ca_PRCB          *Prcb;
116BSP_EXTERN i960ca_control_table *Ctl_tbl;
117
118/* functions */
119
120void bsp_cleanup( void );
121
122i960_isr set_vector( rtems_isr_entry, unsigned int, unsigned int );
123
124#ifdef __cplusplus
125}
126#endif
127
128#endif
129/* end of include file */
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