1 | /* bsp.h |
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2 | * |
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3 | * This include file contains some definitions specific to the |
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4 | * Cyclone CVME960 and CVME961 boards. These boards are the |
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5 | * same except the 960 uses SRAM and the 961 DRAM. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-1999. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | * |
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14 | * $Id$ |
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15 | */ |
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16 | |
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17 | #ifndef __CVME961_h |
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18 | #define __CVME961_h |
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19 | |
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20 | #ifdef __cplusplus |
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21 | extern "C" { |
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22 | #endif |
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23 | |
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24 | #include <bspopts.h> |
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25 | |
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26 | #include <rtems.h> |
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27 | #include <libcpu/i960CA.h> |
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28 | #include <rtems/iosupp.h> |
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29 | #include <rtems/console.h> |
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30 | #include <rtems/clockdrv.h> |
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31 | |
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32 | /* |
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33 | * confdefs.h overrides for this BSP: |
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34 | * - number of termios serial ports (defaults to 1) |
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35 | * - Interrupt stack space is not minimum if defined. |
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36 | */ |
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37 | |
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38 | /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ |
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39 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) |
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40 | |
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41 | /* |
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42 | * Define the interrupt mechanism for Time Test 27 |
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43 | * |
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44 | * NOTE: Following are for i960CA and are board independent |
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45 | * |
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46 | */ |
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47 | |
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48 | #define MUST_WAIT_FOR_INTERRUPT 0 |
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49 | |
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50 | #define Install_tm27_vector( handler ) set_vector( (handler), 6, 1 ) |
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51 | |
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52 | #define Cause_tm27_intr() i960_cause_intr( 0x62 ) |
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53 | |
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54 | #define Clear_tm27_intr() i960_clear_intr( 6 ) |
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55 | |
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56 | #define Lower_tm27_intr() |
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57 | |
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58 | /* |
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59 | * Simple spin delay in microsecond units for device drivers. |
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60 | * This is very dependent on the clock speed of the target. |
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61 | */ |
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62 | |
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63 | #define rtems_bsp_delay( microseconds ) \ |
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64 | { register uint32_t _delay=(microseconds); \ |
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65 | register uint32_t _tmp = 0; /* initialized to avoid warning */ \ |
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66 | asm volatile( "0: \ |
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67 | remo 3,31,%0 ; \ |
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68 | cmpo 0,%0 ; \ |
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69 | subo 1,%1,%1 ; \ |
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70 | cmpobne.t 0,%1,0b " \ |
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71 | : "=d" (_tmp), "=d" (_delay) \ |
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72 | : "0" (_tmp), "1" (_delay) ); \ |
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73 | } |
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74 | |
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75 | /* Constants */ |
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76 | |
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77 | #define RAM_START 0 |
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78 | #define RAM_END 0x100000 |
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79 | |
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80 | /* NINDY console I/O requests: |
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81 | * CO sends a single character to stdout, |
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82 | * CI reads one. |
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83 | */ |
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84 | |
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85 | #define NINDY_INPUT 0 |
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86 | #define NINDY_OUTPUT 1 |
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87 | |
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88 | /* |
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89 | * get_prcb |
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90 | * |
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91 | * Returns the PRCB pointer. |
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92 | */ |
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93 | |
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94 | static inline i960ca_PRCB *get_prcb( void ) |
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95 | { |
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96 | register i960ca_PRCB *_prcb = 0; |
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97 | |
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98 | asm volatile( "calls 5; \ |
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99 | mov g0,%0" \ |
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100 | : "=d" (_prcb) \ |
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101 | : "0" (_prcb) ); |
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102 | return ( _prcb ); |
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103 | } |
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104 | |
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105 | #ifdef C961_INIT |
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106 | #undef BSP_EXTERN |
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107 | #define BSP_EXTERN |
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108 | #else |
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109 | #undef BSP_EXTERN |
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110 | #define BSP_EXTERN extern |
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111 | #endif |
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112 | |
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113 | /* miscellaneous stuff assumed to exist */ |
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114 | |
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115 | extern rtems_configuration_table BSP_Configuration; |
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116 | |
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117 | BSP_EXTERN i960ca_PRCB *Prcb; |
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118 | BSP_EXTERN i960ca_control_table *Ctl_tbl; |
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119 | |
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120 | /* |
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121 | * Device Driver Table Entries |
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122 | */ |
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123 | |
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124 | /* |
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125 | * NOTE: Use the standard Console driver entry |
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126 | */ |
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127 | |
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128 | /* |
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129 | * NOTE: Use the standard Clock driver entry |
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130 | */ |
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131 | |
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132 | /* functions */ |
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133 | |
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134 | void bsp_cleanup( void ); |
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135 | |
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136 | i960_isr_entry set_vector( rtems_isr_entry, unsigned int, unsigned int ); |
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137 | |
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138 | #ifdef __cplusplus |
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139 | } |
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140 | #endif |
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141 | |
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142 | #endif |
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143 | /* end of include file */ |
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