[ac7d5ef0] | 1 | /* bsp.h |
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| 2 | * |
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| 3 | * This include file contains some definitions specific to the |
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| 4 | * Cyclone CVME960 and CVME961 boards. These boards are the |
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| 5 | * same except the 960 uses SRAM and the 961 DRAM. |
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| 6 | * |
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| 7 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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| 8 | * On-Line Applications Research Corporation (OAR). |
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| 9 | * All rights assigned to U.S. Government, 1994. |
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| 10 | * |
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| 11 | * This material may be reproduced by or for the U.S. Government pursuant |
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| 12 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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| 13 | * notice must appear in all copies of this file and its derivatives. |
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| 14 | * |
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| 15 | * $Id$ |
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| 16 | */ |
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| 17 | |
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| 18 | #ifndef __CVME961_h |
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| 19 | #define __CVME961_h |
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| 20 | |
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| 21 | #ifdef __cplusplus |
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| 22 | extern "C" { |
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| 23 | #endif |
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| 24 | |
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| 25 | #include <rtems.h> |
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| 26 | #include <iosupp.h> |
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| 27 | |
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| 28 | /* |
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| 29 | * Define the time limits for RTEMS Test Suite test durations. |
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| 30 | * Long test and short test duration limits are provided. These |
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| 31 | * values are in seconds and need to be converted to ticks for the |
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| 32 | * application. |
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| 33 | * |
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| 34 | */ |
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| 35 | |
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| 36 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
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| 37 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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| 38 | |
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| 39 | /* |
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| 40 | * Define the interrupt mechanism for Time Test 27 |
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| 41 | * |
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| 42 | * NOTE: Following are for i960CA and are board independent |
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| 43 | * |
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| 44 | */ |
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| 45 | |
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| 46 | #define MUST_WAIT_FOR_INTERRUPT 0 |
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| 47 | |
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| 48 | #define Install_tm27_vector( handler ) set_vector( (handler), 6, 1 ) |
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| 49 | |
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| 50 | #define Cause_tm27_intr() i960_cause_intr( 0x62 ) |
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| 51 | |
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| 52 | #define Clear_tm27_intr() i960_clear_intr( 6 ) |
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| 53 | |
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| 54 | #define Lower_tm27_intr() |
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| 55 | |
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| 56 | /* |
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| 57 | * Simple spin delay in microsecond units for device drivers. |
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| 58 | * This is very dependent on the clock speed of the target. |
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| 59 | */ |
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| 60 | |
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| 61 | #define delay( microseconds ) \ |
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| 62 | { register rtems_unsigned32 _delay=(microseconds); \ |
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| 63 | register rtems_unsigned32 _tmp; \ |
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| 64 | asm volatile( "0: \ |
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| 65 | remo 3,31,%0 ; \ |
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| 66 | cmpo 0,%0 ; \ |
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| 67 | subo 1,%1,%1 ; \ |
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| 68 | cmpobne.t 0,%1,0b " \ |
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| 69 | : "=d" (_tmp), "=d" (_delay) \ |
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| 70 | : "0" (_tmp), "1" (_delay) ); \ |
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| 71 | } |
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| 72 | |
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| 73 | /* Constants */ |
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| 74 | |
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| 75 | #define RAM_START 0 |
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| 76 | #define RAM_END 0x100000 |
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| 77 | |
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| 78 | /* NINDY console I/O requests: |
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| 79 | * CO sends a single character to stdout, |
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| 80 | * CI reads one. |
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| 81 | */ |
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| 82 | |
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| 83 | #define NINDY_INPUT 0 |
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| 84 | #define NINDY_OUTPUT 1 |
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| 85 | |
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| 86 | /* |
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| 87 | * get_prcb |
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| 88 | * |
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| 89 | * Returns the PRCB pointer. |
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| 90 | */ |
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| 91 | |
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| 92 | static inline i960ca_PRCB *get_prcb( void ) |
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| 93 | { |
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| 94 | register i960ca_PRCB *_prcb = 0; |
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| 95 | |
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| 96 | asm volatile( "calls 5; \ |
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| 97 | mov g0,%0" \ |
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| 98 | : "=d" (_prcb) \ |
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| 99 | : "0" (_prcb) ); |
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| 100 | return ( _prcb ); |
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| 101 | } |
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| 102 | |
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| 103 | #ifdef C961_INIT |
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| 104 | #undef BSP_EXTERN |
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| 105 | #define BSP_EXTERN |
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| 106 | #else |
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| 107 | #undef BSP_EXTERN |
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| 108 | #define BSP_EXTERN extern |
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| 109 | #endif |
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| 110 | |
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| 111 | /* miscellaneous stuff assumed to exist */ |
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| 112 | |
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| 113 | extern rtems_configuration_table BSP_Configuration; |
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| 114 | |
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| 115 | BSP_EXTERN i960ca_PRCB *Prcb; |
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| 116 | BSP_EXTERN i960ca_control_table *Ctl_tbl; |
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| 117 | |
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| 118 | /* functions */ |
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| 119 | |
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| 120 | void bsp_cleanup( void ); |
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| 121 | |
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| 122 | i960_isr set_vector( rtems_isr_entry, unsigned int, unsigned int ); |
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| 123 | |
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| 124 | #ifdef __cplusplus |
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| 125 | } |
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| 126 | #endif |
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| 127 | |
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| 128 | #endif |
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| 129 | /* end of include file */ |
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