1 | /* Timer_init() |
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2 | * |
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3 | * This routine initializes the timer on the FORCE CPU-386 board. |
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4 | * |
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5 | * Input parameters: NONE |
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6 | * |
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7 | * Output parameters: NONE |
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8 | * |
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9 | * NOTE: This routine will not work if the optimizer is enabled |
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10 | * for some compilers. The multiple writes to the Z8036 |
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11 | * may be optimized away. |
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12 | * |
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13 | * It is important that the timer start/stop overhead be |
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14 | * determined when porting or modifying this code. |
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15 | * |
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16 | * COPYRIGHT (c) 1989-1999. |
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17 | * On-Line Applications Research Corporation (OAR). |
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18 | * |
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19 | * The license and distribution terms for this file may be |
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20 | * found in the file LICENSE in this distribution or at |
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21 | * http://www.rtems.com/license/LICENSE. |
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22 | * |
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23 | * $Id$ |
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24 | */ |
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25 | |
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26 | #include <rtems.h> |
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27 | #include <bsp.h> |
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28 | #include <stdlib.h> |
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29 | |
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30 | volatile uint32_t Ttimer_val; /* Updated from ISR!!! */ |
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31 | bool benchmark_timer_find_average_overhead; |
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32 | |
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33 | extern void timerisr(void); |
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34 | |
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35 | /* |
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36 | * Number of us per timer interrupt. Note: 1 us == 1 tick. |
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37 | */ |
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38 | |
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39 | #define US_PER_ISR 250 |
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40 | |
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41 | void TimerOn(const rtems_raw_irq_connect_data* used) |
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42 | { |
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43 | |
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44 | Ttimer_val = 0; /* clear timer ISR count */ |
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45 | |
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46 | /* Select timer, stay in mode 0 */ |
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47 | outport_byte (TIMER_MODE, TIMER_SEL0|TIMER_16BIT|TIMER_RATEGEN); |
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48 | |
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49 | /* Set to 250 usec interval */ |
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50 | outport_byte (TIMER_CNTR0, US_PER_ISR & 0xFF ); |
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51 | outport_byte (TIMER_CNTR0, (US_PER_ISR >> 8) & 0xFF ); |
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52 | |
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53 | /* Enable all timers */ |
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54 | outport_byte (TIMER_CONFIG, 0x00); |
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55 | |
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56 | /* |
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57 | * enable interrrupt at i8259 level |
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58 | */ |
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59 | BSP_irq_enable_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE); |
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60 | } |
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61 | |
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62 | static int TimerIsOn (const rtems_raw_irq_connect_data *used) |
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63 | { |
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64 | return BSP_irq_enabled_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE); |
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65 | } |
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66 | |
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67 | void TimerOff(const rtems_raw_irq_connect_data* used) |
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68 | { |
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69 | /* Disable all timers */ |
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70 | outport_byte (TIMER_CONFIG, 0x80); |
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71 | |
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72 | /* |
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73 | * disable interrrupt at i8259 level |
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74 | */ |
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75 | BSP_irq_disable_at_i8259s(used->idtIndex - BSP_IRQ_VECTOR_BASE); |
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76 | /* reset timer mode to standard (DOS) value */ |
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77 | } |
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78 | |
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79 | static rtems_raw_irq_connect_data timer_raw_irq_data = { |
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80 | BSP_PERIODIC_TIMER + BSP_IRQ_VECTOR_BASE, |
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81 | timerisr, |
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82 | TimerOn, |
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83 | TimerOff, |
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84 | TimerIsOn |
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85 | }; |
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86 | |
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87 | static rtems_raw_irq_connect_data old_raw_irq_data = { |
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88 | BSP_PERIODIC_TIMER + BSP_IRQ_VECTOR_BASE, |
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89 | }; |
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90 | |
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91 | void Timer_exit(void) |
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92 | { |
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93 | if (!i386_delete_idt_entry(&timer_raw_irq_data)) { |
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94 | printk("Timer_exit:Timer raw handler removal failed\n"); |
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95 | rtems_fatal_error_occurred(1); |
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96 | } |
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97 | } |
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98 | |
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99 | void benchmark_timer_initialize(void) |
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100 | { |
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101 | |
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102 | static bool First = true; |
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103 | |
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104 | if (First) |
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105 | { |
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106 | First = false; |
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107 | |
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108 | if (!i386_get_current_idt_entry (&old_raw_irq_data)) { |
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109 | printk("benchmark_timer_initialize: failed to get old raw irq entry.\n"); |
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110 | rtems_fatal_error_occurred(1); |
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111 | } |
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112 | |
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113 | if (!i386_delete_idt_entry (&old_raw_irq_data)) { |
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114 | printk("benchmark_timer_initialize: failed to delete old raw irq entry.\n"); |
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115 | rtems_fatal_error_occurred(1); |
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116 | } |
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117 | |
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118 | atexit(Timer_exit); /* Try not to hose the system at exit. */ |
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119 | if (!i386_set_idt_entry (&timer_raw_irq_data)) { |
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120 | printk("benchmark_timer_initialize: raw handler installation failed.\n"); |
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121 | rtems_fatal_error_occurred(1); |
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122 | } |
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123 | } |
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124 | |
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125 | /* wait for ISR to be called at least once */ |
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126 | Ttimer_val = 0; |
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127 | while (Ttimer_val == 0) |
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128 | continue; |
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129 | Ttimer_val = 0; |
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130 | } |
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131 | |
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132 | #define AVG_OVERHEAD 3 /* It typically takes 3.0 microseconds */ |
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133 | /* (3 ticks) to start/stop the timer. */ |
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134 | #define LEAST_VALID 4 /* Don't trust a value lower than this */ |
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135 | |
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136 | int benchmark_timer_read(void) |
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137 | { |
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138 | register uint32_t clicks, total; |
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139 | register uint8_t lsb, msb; |
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140 | |
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141 | /* latch the count */ |
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142 | outport_byte (TIMER_MODE, TIMER_SEL0|TIMER_LATCH ); |
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143 | |
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144 | /* read the count */ |
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145 | inport_byte (TIMER_CNTR0, lsb ); |
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146 | inport_byte (TIMER_CNTR0, msb ); |
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147 | |
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148 | /* |
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149 | * Timer ISR increments Ttimer_val every US_PER_ISR clock ticks, |
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150 | * where 1 tick == 1 us. Below, 'click' is in microseconds. |
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151 | * |
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152 | * This assumes the timer input clocks are sourced from the system's |
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153 | * prescaled clock (PSCLK), which is set to be at 1MHz. |
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154 | */ |
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155 | clicks = (msb << 8) | lsb; |
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156 | total = Ttimer_val * US_PER_ISR + (US_PER_ISR - clicks); |
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157 | |
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158 | if ( benchmark_timer_find_average_overhead == true ) |
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159 | return total; /* in one microsecond units */ |
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160 | else if ( total < LEAST_VALID ) |
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161 | return 0; /* below timer resolution */ |
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162 | else |
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163 | return (total - AVG_OVERHEAD); |
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164 | } |
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165 | |
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166 | void benchmark_timer_disable_subtracting_average_overhead( |
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167 | bool find_flag |
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168 | ) |
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169 | { |
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170 | benchmark_timer_find_average_overhead = find_flag; |
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171 | } |
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172 | |
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173 | /* |
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174 | * Wait_X_ms: a delay loop used by the network driver... |
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175 | */ |
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176 | |
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177 | #define SLOW_DOWN_IO 0x80 /* I/O port which does nothing */ |
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178 | #define LOOP1MS 320 /* Just a guess.... */ |
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179 | |
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180 | void Wait_X_ms (unsigned timeToWait) |
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181 | { |
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182 | unsigned i, j; |
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183 | |
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184 | for (j=0; j<timeToWait; j++) |
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185 | for (i=0; i<LOOP1MS; i++) |
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186 | outport_byte (SLOW_DOWN_IO, 0); |
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187 | } |
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