source: rtems/c/src/lib/libbsp/i386/ts_386ex/start/start.S @ 5c7f274

4.104.114.84.95
Last change on this file since 5c7f274 was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 16:01:48

Remove duplicate white lines.

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1/*
2 *  This file is the main boot and configuration file for the TS-1325. It is
3 *  solely responsible for initializing the internal register set to reflect
4 *  the proper board configuration.  This version is modified from the i386ex
5 *  BSP startup:
6 *
7 *    1) 1 MB RAM @ 0x0100000
8 *    2) 1 MB RAM @ 0x0 but with standard DOS memory usage.
9 *    3) Timer0 used as RTEMS clock ticker, 1 msec tick rate.
10 *    4) READY# is generated by CPU
11 *
12 *  The file describes the ".initial" section, which contains:
13 *     1) device configuration code
14 *     2) interrupt descriptor table
15 *     3) global descriptor table
16 *     4) and initial boot code
17 *
18 *  Modified by:
19 *
20 *    Tony Ambardar
21 *    University of British Columbia
22 *    tonya@ece.ubc.ca
23 *
24 *  The license and distribution terms for this file may be
25 *  found in the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 *
28 *  $Id$
29 */
30
31#include <rtems/asm.h>
32#include "macros.inc"
33#include "80386ex.inc"
34
35#include "ts_1325.inc"             /* controls for LED and button */
36
37/*
38 * NEW_GAS Needed for binutils 2.9.1.0.7 and higher
39 */
40
41        EXTERN (boot_card)         /* exits to bspstart   */
42        EXTERN (_DOS_seg_base)     /* defined in startup/linkcmds */
43        EXTERN (Clock_exit)
44
45        PUBLIC (Interrupt_descriptor_table)
46        PUBLIC ( SYM(IDTR) )
47        PUBLIC (_Global_descriptor_table)
48        PUBLIC ( SYM(GDTR) )
49
50        PUBLIC( SYM(_init_i386ex) )
51
52        .section .initial, "ax"
53
54/*
55 * Enable access to peripheral register at expanded I/O addresses
56 */
57SYM(_init_i386ex):
58        .code16
59/*
60        LED_GREEN
61        WAIT_BUTTON
62*/
63#       cli                    Move this up for now for debug.
64        movw    $0x8000 , ax
65        outb    al , $REMAPCFGH
66        xchg    al , ah
67        outb    al , $REMAPCFGL
68        outw    ax , $REMAPCFG ;
69/*
70        LED_OFF
71        WAIT_BUTTON
72*/
73/*
74 * Configure operation of the A20 Address Line
75 */
76SYM(A20):
77        movw    $PORT92 , dx
78
79        inb     dx      , al   # clear A20 port reset
80        andb    $0xfe   , al   # b0 Fast Reset(0)=disabled,(1)=reset triggered
81        orb     $0x02   , al   # Bit 1 Fast A20 = 0 (always 0) else enabled.
82        outb    al      , dx
83/*
84        LED_YELLOW
85        WAIT_BUTTON
86*/
87SYM(Watchdog):
88        movw    $WDTSTATUS      , dx    # address the WDT status port
89        inb     dx              , al    # get the WDT status
90        orb     $0x01           , al    # set the CLKDIS bit
91        outb    al              , dx    # disable the clock to the WDT
92/*
93        LED_GREEN
94        WAIT_BUTTON
95*/
96/*
97 * Initialize Refresh Control Unit for:
98 *      Refresh Address = 0x0000
99
100 *      Refresh gate between rows is 20.0 (???) uSec
101 *      Using a CLK2 frequency of 50Mhz ( 25Mhz CPU )
102 *      The refresh unit is enabled
103 *      The refresh pin is not used.
104 *
105 *      Different TS units might have different refresh intervals, so
106 *      comment out. Will be set up anyway after booting to DOS.
107 */
108
109/*
110SYM(InitRCU):
111        SetExRegWord( RFSCIR , 0x1F4)   # refresh interval 500
112        SetExRegWord( RFSBAD , 0x0)     # base address
113        SetExRegWord( RFSADD , 0x0)     # address register
114        SetExRegWord( RFSCON , 0x8000)  # enable bit
115*/
116
117/*
118        LED_OFF
119        WAIT_BUTTON
120*/
121/*
122 * Initialize clock and power mgmt unit for:
123 *      Clock Frequency = 50 Mhz
124 *      Prescaled clock output = 1 Mhz
125 *      Normal halt instructions
126 *
127 *      NOTE: Hope this doesn't change the COMCLK frequency
128 */
129
130SYM(InitClk):
131        SetExRegByte( PWRCON, 0x0 )
132        SetExRegWord( CLKPRS, 0x17)     # 0x13 for 1.19318 MHz.  0x17 for 1MHz.
133
134/**************************************************************
135 * Initialize the Pin Configurations
136 *************************************************************/
137/*
138        LED_YELLOW
139        WAIT_BUTTON
140*/
141/*
142 *      Initialize I/O port 1 for:
143 *      PIN 0 = 0,      Inport for external push-button switch
144 *      PIN 1 = 1,      RTS0# to package pin
145 *      PIN 2 = 1,      DTR0# to package pin
146 *      PIN 3 = 1,      DSR0# to package pin
147 *      PIN 4 = 0,      Inport ???
148 *      PIN 5 = 0,      Outport (Green LED, 1 = ON)
149 *      PIN 6 = 0,      Outport (Red LED, 1 = OFF)
150 *      PIN 7 = 0,      Inport ???
151 */
152
153SYM(InitPort1):
154        SetExRegByte( P1LTC     , 0xd1 )
155        SetExRegByte( P1DIR     , 0x91)
156        SetExRegByte( P1CFG     , 0x0e)
157/*
158        LED_GREEN
159        WAIT_BUTTON
160*/
161/*
162 *      Initialize I/O port 2 for:
163 *      PIN 0 = 0,      Outport ???
164 *      PIN 1 = 0,      Outport ???
165 *      PIN 2 = 0,      Outport ???
166 *      PIN 3 = 0,      Outport ???
167 *      PIN 4 = 0,      Outport ???
168 *      PIN 5 = 1,      Int. periph, RXD0
169 *      PIN 6 = 1,      Int. periph, TXD0
170 *      PIN 7 = 0,      Outport ???
171 */
172
173SYM(InitPort2):
174        SetExRegByte( P2LTC     , 0x1f )
175        SetExRegByte( P2DIR     , 0x00  )
176        SetExRegByte( P2CFG     , 0x60)
177/*
178        LED_OFF
179        WAIT_BUTTON
180*/
181/*
182 *      Initialize I/O port 3 P3CFG
183 *      PIN 0 = 1,      Int. periph, TMROUT0
184 *      PIN 1 = 1,      Int. periph, TMROUT1
185 *      PIN 2 = 1,      Int. periph, INT0 (IR1)
186 *      PIN 3 = 1,      Int. periph, INT1 (IR5)
187 *      PIN 4 = 1,      Int. periph, INT2 (IR6)
188 *      PIN 5 = 1,      Int. periph, INT2 (IR7)
189 *      PIN 6 = 0,      Outport ???
190 *      PIN 7 = 1,      Int. periph, COMCLK used for serial I/O
191 */
192
193SYM(InitPort3):
194        SetExRegByte( P3LTC     , 0x00 )
195        SetExRegByte( P3DIR     , 0xbf )
196        SetExRegByte( P3CFG     , 0xbf )  # can check TMROUT0
197/*
198        LED_YELLOW
199        WAIT_BUTTON
200*/
201/*
202 *      Initialize Peripheral Pin Configurations:
203 *      PIN 0 = 1,      Select RTS1#
204 *      PIN 1 = 1,      Select DTR1#
205 *      PIN 2 = 1,      Select TXD1#
206 *      PIN 3 = 1,      Select CTS1#
207 *      PIN 4 = 1,      CS5
208 *      PIN 5 = 1,      Timer2 pins enabled
209 *      PIN 6 = 0,      Select CS6#
210 *      PIN 7 = 0,      Don't care
211 */
212
213SYM(InitPeriph):
214        SetExRegByte( PINCFG , 0x3f)
215/*
216        LED_GREEN
217        WAIT_BUTTON
218*/
219/*
220 *      Initialize the Asynchronous Serial Ports:
221 *      BIT 7 = 1,      Internal SIO1 modem signals
222 *      BIT 6 = 1,      Internal SIO0 modem signals
223 *      BIT 2 = 0,      PSCLK for SSIO clock
224 *      BIT 1 = 1,      SERCLK for SIO1 clock
225 *      BIT 0 = 1,      SERCLK for SIO0 clock
226 */
227
228SYM(InitSIO):
229        SetExRegByte( SIOCFG, 0x00 ) # COMCLK -> baud-rate generator
230                                     # modem signals -> package pins
231        SetExRegByte( LCR0, 0x80 )  # latch DLL0, DLH0
232        SetExRegByte( DLL0, 0x01 )  # 0x0C sets to 9600 baud 0x6 = 19.2K
233        SetExRegByte( DLH0, 0x00 )  # 0x4 is 28.8K baud, 0x1 is 115K baud
234        SetExRegByte( LCR0, 0x03 )  # enable r/w buffers, IER0 accessible
235                                    # mode 8-n-1
236        SetExRegByte( IER0, 0x00 )  # no generated interrupts
237
238        SetExRegByte( LCR1, 0x80 )  # latch DLL0, DLH0
239        SetExRegByte( DLL1, 0x01 )  # 0x0C set to 9600 baud, 0x6 = 19.2K
240        SetExRegByte( DLH1, 0x00 )  # 0x4 is 28.8K baud
241        SetExRegByte( LCR1, 0x03 )  # enable r/w buffers, IER1 accessible
242                                        # reg 8-n-1
243        SetExRegByte( IER1, 0x00 )  # no generated intrrupts
244/*
245        LED_OFF
246        WAIT_BUTTON
247*/
248SYM(InitMCR):
249        SetExRegByte( MCR0, 0x03 )  # standard mode, RTS,DTR activated
250        SetExRegByte( MCR1, 0x03 )  # standard mode, RTS,DTR activated
251
252/*
253 *      Initialize Timer for:
254 *      BIT 7 = 1,      Timer clocks disabled
255 *      BIT 6 = 0,      Reserved
256 *      BIT 5 = 1,      TMRCLK2 instead of Vcc to Gate2
257 *      BIT 4 = 0,      PSCLK to CLK2
258 *      BIT 3 = 1,      TMRCLK1 instead of Vcc to Gate1
259 *      BIT 2 = 0,      PSCLK to Gate1
260 *      BIT 1 = 0,      Vcc to Gate0
261 *      BIT 0 = 0,      PSCLK to Gate0
262 */
263/*
264        LED_YELLOW
265        WAIT_BUTTON
266*/
267SYM(InitTimer):
268        SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1
269                                     # and 2 are set to Vcc
270
271        SetExRegByte(TMRCON , 0x34 ) # prepare to write counter 0 LSB,MSB
272        SetExRegByte(TMR0   , 0x00 ) # sfa
273        SetExRegByte(TMR0   , 0x00 ) # sfa
274
275        SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc
276        SetExRegByte(TMR1   , 0x00 ) # sfa
277        SetExRegByte(TMR1   , 0x00 ) # sfa
278
279        SetExRegByte(TMRCON , 0xB0 ) # mode 0 disables on gate =Vcc
280        SetExRegByte(TMR2   , 0x00 ) #
281        SetExRegByte(TMR2   , 0x00 ) #
282
283/*
284        LED_GREEN
285        WAIT_BUTTON
286*/
287/*
288 *      Initialize the DMACFG register for:
289 *      BIT 7    = 1  , Disable DACK#1
290 *      BITs 6:4 = 100, TMROUT2 connected to DRQ1
291 *      BIT 3    = 1  , Disable DACK0#
292 *      BIT 2:0  = 000, Pin is connected to DRQ0
293 *
294 *      NOTE: not 100% sure of this...
295 */
296
297        SetExRegByte(DMACFG , 0xC0  )
298        SetExRegByte(DMACMD1, 0x00 ) # disable both DMA channels
299        SetExRegByte(DMAMOD1, 0x40 ) # DMA0 single transer mode
300/*
301        LED_OFF
302        WAIT_BUTTON
303*/
304/*
305 *      Initialize the INTCFG register for:
306 *      BIT 7 = 0,      8259 cascade disabled
307 *      BIT 3 = 0,      SLAVE IR6 connected to Vss
308 *      BIT 2 = 0,      SLAVE IR5 connected to Vss
309 *      BIT 1 = 0,      SLAVE IR1 connected to SSIOINT
310 *      BIT 0 = 0,      SLAVE IR0 connected to Vss
311 *
312 *      NOTE: not 100% sure of this either... Why IR5 active?
313 */
314
315SYM(InitInt):
316
317        cli                               # !
318/*
319        LED_YELLOW
320        WAIT_BUTTON
321*/
322        SetExRegByte(ICW1S  , 0x11 ) # EDGE TRIGGERED
323        SetExRegByte(ICW2S  , 0x28 ) # Slave base vector after Master
324        SetExRegByte(ICW3S  , 0x02 ) # slave cascaded to IR2 on master
325        SetExRegByte(ICW4S  , 0x01 ) # fully nested mode, no EOI
326
327        SetExRegByte(ICW1M  , 0x11 ) # edge triggered
328        SetExRegByte(ICW2M  , 0x20 ) # base vector starts at byte 32
329        SetExRegByte(ICW3M  , 0x04)  # internal slave cascaded from master IR2
330        SetExRegByte(ICW4M  , 0x01 ) # idem
331
332        SetExRegByte(OCW1M  , 0xfb ) # mask master IRQs, but not IR2 (cascade)
333        SetExRegByte(OCW1S  , 0xff ) # mask all slave IRQs
334        SetExRegByte(INTCFG , 0x00 ) # slave IRs -> Vss or SSIOINT
335
336/*      The i8259s_cache (IRQ mask) location is in BSS, which is zeroed later!
337 *      So to initialize the cache we should do the following command after
338 *      the BSS is zeroed, and in 32-bit protected mode.
339 *
340 *      movw    $0xFFFB, SYM(i8259s_cache)
341 *
342 */
343
344/*
345        NOTE: not sure about this so comment out...
346
347SYM(SetCS4):
348        SetExRegWord(CS4ADL , 0x702)         #Configure chip select 4
349        SetExRegWord(CS4ADH , 0x00)
350        SetExRegWord(CS4MSKH, 0x03F)
351        SetExRegWord(CS4MSKL, 0xFC01)
352*/
353/*
354        LED_GREEN
355        WAIT_BUTTON
356*/
357/*****************************
358 * Load the Global Descriptor
359 * Table Register
360 ****************************/
361
362        movl    $SYM(GDTR), eax
363        andl    $0xFFFF, eax
364
365#ifdef NEW_GAS
366        addr32
367        data32
368#endif
369
370#if 0
371        lgdt     (eax)                    #  location of GDT in segment
372#endif
373        lgdt SYM(GDTR) #  location of GDT
374
375/*
376        NOTE: not sure about this either so comment out for now...
377SYM(SetUCS):
378        SetExRegWord(UCSADL, 0xC503)      # values taken from TS-1325 memory
379        SetExRegWord(UCSADH, 0x000D)
380        SetExRegWord(UCSMSKH, 0x0000)
381        SetExRegWord(UCSMSKL, 0x3C01)     # configure upper chip select
382*/
383/*
384        LED_OFF
385        WAIT_BUTTON
386*/
387/***************************
388 * Switch to Protected Mode
389 ***************************/
390        mov     cr0, eax
391        orw     $0x1, ax
392        mov     eax, cr0
393
394/**************************
395 * Flush prefetch queue,
396 * and load CS selector
397 *********************/
398/*
399        LED_YELLOW
400        WAIT_BUTTON
401*/
402        ljmpl $ GDT_CODE_PTR , $  SYM(_load_segment_registers) # sets the code selector
403
404/*
405 * Load the segment registers
406 */
407SYM(_load_segment_registers):
408        .code32
409/*
410        LED_GREEN
411        WAIT_BUTTON
412*/
413        pLOAD_SEGMENT( GDT_DATA_PTR, fs)
414        pLOAD_SEGMENT( GDT_DATA_PTR, gs)
415        pLOAD_SEGMENT( GDT_DATA_PTR, ss)
416        pLOAD_SEGMENT( GDT_DATA_PTR, ds)
417        pLOAD_SEGMENT( GDT_DATA_PTR, es)
418
419/*
420 *  Set up the stack
421 */
422/*
423        LED_OFF
424        WAIT_BUTTON
425*/
426SYM(lidtr):
427        lidt    SYM(IDTR)
428/*
429        LED_YELLOW
430        WAIT_BUTTON
431*/
432SYM (_establish_stack):
433        movl    $_ebss, eax             # stack starts right after bss
434        movl    $stack_origin, esp      # this is the high starting address
435        movl    $stack_origin, ebp
436/*
437        LED_GREEN
438        WAIT_BUTTON
439*/
440/*
441 *  Zero out the BSS segment
442 */
443SYM (zero_bss):
444        cld                             # make direction flag count up
445        movl    $ SYM (_ebss),ecx       # find end of .bss
446        movl    $ SYM (_bss_start),edi  # edi = beginning of .bss
447        subl    edi,ecx                 # ecx = size of .bss in bytes
448        shrl    ecx                     # size of .bss in longs
449        shrl    ecx
450        xorl    eax,eax                 # value to clear out memory
451        repne                           # while ecx != 0
452        stosl                           # clear a long in the bss
453/*
454 *  Now we can initialize the IRQ mask in i8259s_cache
455 */
456        movw    $0xFFFB, SYM(i8259s_cache)
457/*
458        LED_YELLOW                      # Indicate ready to run
459        WAIT_BUTTON
460*/
461        LED_GREEN                       # Indicate RTEMS running!
462
463/*
464 *  Transfer control to User's Board Support Package
465 */
466        pushl   $0                       # environp
467        pushl   $0                       # argv
468        pushl   $0                       # argc
469        call SYM(boot_card)
470        addl    $12,esp
471
472        LED_RED                          # Indicate RTEMS exited
473/*
474        WAIT_BUTTON
475*/
476        cli                              # stops interrupts after hlt!
477        hlt                              # shutdown
478
479        .balign 4                        # align tables to 4 byte boundary
480
481SYM(IDTR):      DESC3( SYM(Interrupt_descriptor_table), 0x07ff );
482
483SYM(Interrupt_descriptor_table):   /* Now in data section */
484        .rept 256
485        .word 0,0,0,0
486        .endr
487
488/*
489 *  Use the first (null) entry in the the GDT as a self-pointer for the GDTR.
490 *  (looks like a common trick)
491 */
492
493SYM (_Global_descriptor_table):
494SYM(GDTR):      DESC3( GDTR, 0x17 );      # one less than the size
495                .word 0                   # padding to DESC2 size
496SYM(GDT_CODE):  DESC2(0xffff,0,0x0,0x9B,0xDF,0x00);
497SYM(GDT_DATA):  DESC2(0xffff,0,0x0,0x92,0xDF,0x00); # was CF
498SYM(GDT_END):
499
500END
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