1 | /* |
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2 | * This include file definitions related to an Intel i386ex board. |
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3 | * |
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4 | * COPYRIGHT (c) 1989-1999. |
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5 | * On-Line Applications Research Corporation (OAR). |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in the file LICENSE in this distribution or at |
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9 | * http://www.rtems.com/license/LICENSE. |
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10 | * |
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11 | * $Id$ |
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12 | */ |
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13 | |
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14 | |
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15 | #ifndef __TS386_h |
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16 | #define __TS386_h |
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17 | |
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18 | #ifdef __cplusplus |
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19 | extern "C" { |
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20 | #endif |
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21 | |
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22 | #include <bspopts.h> |
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23 | |
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24 | #include <rtems.h> |
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25 | #include <iosupp.h> |
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26 | #include <console.h> |
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27 | #include <clockdrv.h> |
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28 | #include <rtems/bspIo.h> |
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29 | #include <libcpu/cpu.h> |
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30 | #include <irq.h> |
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31 | |
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32 | /* |
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33 | * confdefs.h overrides for this BSP: |
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34 | * - termios serial ports (defaults to 1) |
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35 | * - Interrupt stack space is not minimum if defined. |
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36 | */ |
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37 | |
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38 | /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ |
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39 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (8 * 1024) |
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40 | |
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41 | /* |
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42 | * Network driver configuration |
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43 | */ |
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44 | |
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45 | struct rtems_bsdnet_ifconfig; |
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46 | extern int rtems_ne_driver_attach (struct rtems_bsdnet_ifconfig *config); |
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47 | |
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48 | extern void Wait_X_ms (unsigned); |
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49 | |
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50 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1" |
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51 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach |
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52 | |
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53 | #define NE2000_BYTE_TRANSFERS |
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54 | |
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55 | /* |
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56 | * Constants relating to the 8254 (or 8253) programmable interval timers. |
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57 | */ |
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58 | |
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59 | #define TIMER_CONFIG 0xF834 |
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60 | #define IO_TIMER1 0xF040 |
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61 | |
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62 | /* Port address of the control port and timer channels */ |
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63 | |
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64 | #define TIMER_CNTR0 (IO_TIMER1 + 0) /* timer 0 counter port */ |
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65 | #define TIMER_CNTR1 (IO_TIMER1 + 1) /* timer 1 counter port */ |
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66 | #define TIMER_CNTR2 (IO_TIMER1 + 2) /* timer 2 counter port */ |
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67 | #define TIMER_MODE (IO_TIMER1 + 3) /* timer mode port */ |
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68 | #define TIMER_SEL0 0x00 /* select counter 0 */ |
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69 | #define TIMER_SEL1 0x40 /* select counter 1 */ |
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70 | #define TIMER_SEL2 0x80 /* select counter 2 */ |
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71 | #define TIMER_INTTC 0x00 /* mode 0, intr on terminal cnt */ |
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72 | #define TIMER_ONESHOT 0x02 /* mode 1, one shot */ |
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73 | #define TIMER_RATEGEN 0x04 /* mode 2, rate generator */ |
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74 | #define TIMER_SQWAVE 0x06 /* mode 3, square wave */ |
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75 | #define TIMER_SWSTROBE 0x08 /* mode 4, s/w triggered strobe */ |
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76 | #define TIMER_HWSTROBE 0x0a /* mode 5, h/w triggered strobe */ |
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77 | #define TIMER_LATCH 0x00 /* latch counter for reading */ |
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78 | #define TIMER_LSB 0x10 /* r/w counter LSB */ |
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79 | #define TIMER_MSB 0x20 /* r/w counter MSB */ |
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80 | #define TIMER_16BIT 0x30 /* r/w counter 16 bits, LSB first */ |
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81 | #define TIMER_BCD 0x01 /* count in BCD */ |
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82 | |
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83 | /* |
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84 | * Define the time limits for RTEMS Test Suite test durations. |
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85 | * Long test and short test duration limits are provided. These |
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86 | * values are in seconds and need to be converted to ticks for the |
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87 | * application. |
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88 | * |
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89 | */ |
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90 | |
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91 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
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92 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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93 | |
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94 | /* |
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95 | * Define the interrupt mechanism for Time Test 27 |
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96 | * |
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97 | * NOTE: Use a software interrupt for the i386. |
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98 | */ |
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99 | |
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100 | #define MUST_WAIT_FOR_INTERRUTPT 0 |
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101 | |
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102 | |
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103 | #define Install_tm27_vector(handler) \ |
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104 | { \ |
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105 | rtems_isr_entry dummy; \ |
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106 | rtems_interrupt_catch(handler, 0x90, &dummy); \ |
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107 | } |
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108 | #define Cause_tm27_intr() asm volatile( "int $0x90" : : ); |
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109 | |
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110 | #define Clear_tm27_intr() |
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111 | |
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112 | #define Lower_tm27_intr() |
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113 | |
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114 | /* |
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115 | * Simple spin delay in microsecond units for device drivers. |
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116 | * This is very dependent on the clock speed of the target. |
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117 | */ |
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118 | |
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119 | #define rtems_bsp_delay( _microseconds ) \ |
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120 | { \ |
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121 | rtems_unsigned32 _counter; \ |
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122 | \ |
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123 | _counter = (_microseconds); \ |
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124 | \ |
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125 | asm volatile ( "0: nop;" \ |
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126 | " mov %0,%0 ;" \ |
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127 | " loop 0b" : "=c" (_counter) \ |
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128 | : "0" (_counter) \ |
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129 | ); \ |
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130 | \ |
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131 | } |
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132 | |
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133 | /* Constants */ |
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134 | |
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135 | #define RAM_START 0 |
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136 | |
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137 | /* replaced the earlier EI kludge of 0xfffff */ |
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138 | |
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139 | #define RAM_END 0x200000 |
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140 | |
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141 | /* I/O addressing */ |
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142 | |
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143 | /* |
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144 | *#define Is_tx_ready( _status ) ( (_status) & 0x20 ) |
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145 | */ |
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146 | /* dec 20. try the TE instead of TBE as the check */ |
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147 | |
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148 | #define Is_tx_ready( _status ) ( (_status) & 0x40 ) |
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149 | |
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150 | |
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151 | #define Is_rx_ready( _status ) ( (_status) & 0x01 ) |
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152 | |
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153 | /* Structures */ |
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154 | |
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155 | #ifdef F386_INIT |
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156 | #undef BSP_EXTERN |
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157 | #define BSP_EXTERN |
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158 | #else |
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159 | #undef BSP_EXTERN |
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160 | #define BSP_EXTERN extern |
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161 | #endif |
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162 | |
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163 | /* |
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164 | * Device Driver Table Entries |
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165 | */ |
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166 | |
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167 | /* |
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168 | * NOTE: Use the standard Console driver entry |
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169 | */ |
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170 | |
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171 | /* |
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172 | * NOTE: Use the standard Clock driver entry |
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173 | */ |
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174 | |
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175 | /* miscellaneous stuff assumed to exist */ |
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176 | |
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177 | extern rtems_configuration_table BSP_Configuration; |
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178 | |
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179 | #define IDT_SIZE 256 |
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180 | #define GDT_SIZE 3 |
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181 | |
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182 | extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE]; |
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183 | extern segment_descriptors Global_descriptor_table [GDT_SIZE]; |
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184 | |
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185 | BSP_EXTERN unsigned short Idt[3]; /* Interrupt Descriptor Table Address */ |
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186 | BSP_EXTERN unsigned short Gdt[3]; /* Global Descriptor Table Address */ |
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187 | BSP_EXTERN unsigned int Idt_base; |
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188 | BSP_EXTERN unsigned int Gdt_base; |
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189 | |
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190 | /* routines */ |
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191 | |
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192 | #ifdef __cplusplus |
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193 | } |
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194 | #endif |
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195 | |
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196 | #endif |
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197 | /* end of include file */ |
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