source: rtems/c/src/lib/libbsp/i386/ts_386ex/include/bsp.h @ 1d4048b2

4.104.114.84.95
Last change on this file since 1d4048b2 was 16a384cf, checked in by Joel Sherrill <joel.sherrill@…>, on 04/23/99 at 16:35:11

New BSP from Tony R. Ambardar <tonya@…> from the
University of British Columbia. The BSP is for:

Yes, this is the "entry model" of a series of boards from Technologic
Systems. Costs <$200 I believe. They have a WWW page at www.t-systems.com.
I am letting them know about the availability of this BSP too.

  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 *  This include file definitions related to an Intel i386ex board.
3 *
4 *  COPYRIGHT (c) 1989-1998.
5 *  On-Line Applications Research Corporation (OAR).
6 *  Copyright assigned to U.S. Government, 1994.
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  $Id$
13 */
14
15
16#ifndef __TS386_h
17#define __TS386_h
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#include <rtems.h>
24#include <iosupp.h>
25#include <console.h>
26#include <clockdrv.h>
27#include <bspIo.h>
28#include <irq.h>
29 
30/*
31 * Network driver configuration
32 */
33
34struct rtems_bsdnet_ifconfig;
35extern int rtems_ne_driver_attach (struct rtems_bsdnet_ifconfig *config);
36
37extern void Wait_X_ms (unsigned);
38
39#define RTEMS_BSP_NETWORK_DRIVER_NAME         "ne1"
40#define RTEMS_BSP_NETWORK_DRIVER_ATTACH       rtems_ne_driver_attach
41
42#define NE2000_BYTE_TRANSFERS
43
44/*
45 * Constants relating to the 8254 (or 8253) programmable interval timers.
46 */
47
48#define TIMER_CONFIG   0xF834
49#define IO_TIMER1      0xF040
50
51  /* Port address of the control port and timer channels */
52
53#define TIMER_CNTR0    (IO_TIMER1 + 0) /* timer 0 counter port           */
54#define TIMER_CNTR1    (IO_TIMER1 + 1) /* timer 1 counter port           */
55#define TIMER_CNTR2    (IO_TIMER1 + 2) /* timer 2 counter port           */
56#define TIMER_MODE     (IO_TIMER1 + 3) /* timer mode port                */
57#define TIMER_SEL0     0x00            /* select counter 0               */
58#define TIMER_SEL1     0x40            /* select counter 1               */
59#define TIMER_SEL2     0x80            /* select counter 2               */
60#define TIMER_INTTC    0x00            /* mode 0, intr on terminal cnt   */
61#define TIMER_ONESHOT  0x02            /* mode 1, one shot               */
62#define TIMER_RATEGEN  0x04            /* mode 2, rate generator         */
63#define TIMER_SQWAVE   0x06            /* mode 3, square wave            */
64#define TIMER_SWSTROBE 0x08            /* mode 4, s/w triggered strobe   */
65#define TIMER_HWSTROBE 0x0a            /* mode 5, h/w triggered strobe   */
66#define TIMER_LATCH    0x00            /* latch counter for reading      */
67#define TIMER_LSB      0x10            /* r/w counter LSB                */
68#define TIMER_MSB      0x20            /* r/w counter MSB                */
69#define TIMER_16BIT    0x30            /* r/w counter 16 bits, LSB first */
70#define TIMER_BCD      0x01            /* count in BCD                   */
71
72/*
73 *  Define the time limits for RTEMS Test Suite test durations.
74 *  Long test and short test duration limits are provided.  These
75 *  values are in seconds and need to be converted to ticks for the
76 *  application.
77 *
78 */
79
80#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
81#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
82
83/*
84 *  Define the interrupt mechanism for Time Test 27
85 *
86 *  NOTE: Use a software interrupt for the i386.
87 */
88
89#define MUST_WAIT_FOR_INTERRUTPT 0
90
91
92#define Install_tm27_vector(handler) \
93{ \
94  rtems_isr_entry dummy; \
95  rtems_interrupt_catch(handler, 0x90, &dummy); \
96}
97#define Cause_tm27_intr()              asm volatile( "int $0x90" : : );
98
99#define Clear_tm27_intr()
100
101#define Lower_tm27_intr()
102
103/*
104 *  Simple spin delay in microsecond units for device drivers.
105 *  This is very dependent on the clock speed of the target.
106 */
107
108#define delay( _microseconds ) \
109  { \
110    rtems_unsigned32 _counter; \
111    \
112    _counter = (_microseconds); \
113    \
114    asm volatile ( "0: nop;" \
115                   " mov %0,%0 ;" \
116                   " loop 0b" : "=c" (_counter) \
117                              : "0"  (_counter) \
118                 ); \
119    \
120  }
121
122/* Constants */
123
124#define RAM_START 0
125
126/* replaced the earlier EI kludge of 0xfffff */
127
128#define RAM_END   0x200000
129
130/* I/O addressing */
131
132/*
133 *#define Is_tx_ready( _status ) ( (_status) & 0x20 )
134 */
135/* dec 20. try the TE instead of TBE as the check */
136
137#define Is_tx_ready( _status ) ( (_status) & 0x40 )
138
139
140#define Is_rx_ready( _status ) ( (_status) & 0x01 )
141
142/* Structures */
143
144#ifdef F386_INIT
145#undef BSP_EXTERN
146#define BSP_EXTERN
147#else
148#undef BSP_EXTERN
149#define BSP_EXTERN extern
150#endif
151
152/*
153 *  Device Driver Table Entries
154 */
155 
156/*
157 * NOTE: Use the standard Console driver entry
158 */
159 
160/*
161 * NOTE: Use the standard Clock driver entry
162 */
163 
164/* miscellaneous stuff assumed to exist */
165
166extern rtems_configuration_table BSP_Configuration;
167
168#define IDT_SIZE 256
169#define GDT_SIZE 3
170
171extern interrupt_gate_descriptor Interrupt_descriptor_table[IDT_SIZE];
172extern segment_descriptors Global_descriptor_table   [GDT_SIZE];
173
174BSP_EXTERN unsigned short Idt[3];  /* Interrupt Descriptor Table Address */
175BSP_EXTERN unsigned short Gdt[3];  /* Global Descriptor Table Address */
176BSP_EXTERN unsigned int   Idt_base;
177BSP_EXTERN unsigned int   Gdt_base;
178
179/* routines */
180
181#ifdef __cplusplus
182}
183#endif
184
185#endif
186/* end of include file */
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