source: rtems/c/src/lib/libbsp/i386/shared/smp/smp-imps.h @ 01f2692e

4.115
Last change on this file since 01f2692e was 01f2692e, checked in by Jennifer Averett <Jennifer.Averett@…>, on 08/01/11 at 13:41:50

2011-08-01 Jennifer Averett <Jennifer.Averett@…>

PR 1802

  • shared/irq/irq_asm.S, shared/irq/irq_init.c, shared/smp/smp-imps.c, shared/smp/smp-imps.h: Add SMP support for i386.
  • shared/smp/getcpuid.c: New file.
  • Property mode set to 100644
File size: 6.6 KB
Line 
1/*
2 * Author: Erich Boleyn  <erich@uruk.org>
3 *         http://www.uruk.org/~erich/
4 *
5 * Copyright (c) 1997-2011 Erich Boleyn.  All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 *    derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/*
31 *  Header file implementing Intel MultiProcessor Specification (MPS)
32 *  version 1.1 and 1.4 SMP hardware control for Intel Architecture CPUs,
33 *  with hooks for running correctly on a standard PC without the hardware.
34 *
35 *  This file was created from information in the Intel MPS version 1.4
36 *  document, order number 242016-004, which can be ordered from the
37 *  Intel literature center.
38 */
39
40/*
41 *  This file is based upon code by Eric Boleyn as documented above. 
42 *  RTEMS support was added and minimal other changes were made. 
43 *  This should make it easier to compare this file with the original
44 *  version.
45 *
46 *  COPYRIGHT (c) 2011.
47 *  On-Line Applications Research Corporation (OAR).
48 *
49 *  The license and distribution terms for this file may be
50 *  found in the file LICENSE in this distribution or at
51 *  http://www.rtems.com/license/LICENSE.
52 *
53 *  $Id$
54 */
55
56#ifndef _SMP_IMPS_H
57#define _SMP_IMPS_H
58
59/* make sure "apic.h" is included */
60#ifndef _APIC_H
61#error          Must include "apic.h" before "smp-imps.h"
62#endif  /* !_APIC_H */
63
64/*
65 *  Defines used.
66 */
67
68#define IMPS_READ(x)    (*((volatile unsigned *) (x)))
69#define IMPS_WRITE(x,y) (*((volatile unsigned *) (x)) = (y))
70
71#ifdef IMPS_DEBUG
72#define IMPS_DEBUG_PRINT(x)  KERNEL_PRINT(x)
73#else  /* !IMPS_DEBUG */
74#define IMPS_DEBUG_PRINT(x)
75#endif /* !IMPS_DEBUG */
76
77#define IMPS_MAX_CPUS                   APIC_BCAST_ID
78
79/*
80 *  This is the value that must be in the "sig" member of the MP
81 *  Floating Pointer Structure.
82 */
83#define IMPS_FPS_SIGNATURE      ('_' | ('M'<<8) | ('P'<<16) | ('_'<<24))
84#define IMPS_FPS_IMCRP_BIT      0x80
85#define IMPS_FPS_DEFAULT_MAX    7
86
87/*
88 *  This is the value that must be in the "sig" member of the MP
89 *  Configuration Table Header.
90 */
91#define IMPS_CTH_SIGNATURE      ('P' | ('C'<<8) | ('M'<<16) | ('P'<<24))
92
93/*
94 *  These are the "type" values for Base MP Configuration Table entries.
95 */
96#define         IMPS_FLAG_ENABLED       1
97#define IMPS_BCT_PROCESSOR              0
98#define         IMPS_CPUFLAG_BOOT       2
99#define IMPS_BCT_BUS                    1
100#define IMPS_BCT_IOAPIC                 2
101#define IMPS_BCT_IO_INTERRUPT           3
102#define IMPS_BCT_LOCAL_INTERRUPT        4
103#define         IMPS_INT_INT            0
104#define         IMPS_INT_NMI            1
105#define         IMPS_INT_SMI            2
106#define         IMPS_INT_EXTINT         3
107
108
109/*
110 *  Typedefs and data item definitions done here.
111 */
112
113typedef struct imps_fps imps_fps;       /* MP floating pointer structure */
114typedef struct imps_cth imps_cth;       /* MP configuration table header */
115typedef struct imps_processor imps_processor;
116typedef struct imps_bus imps_bus;
117typedef struct imps_ioapic imps_ioapic;
118typedef struct imps_interrupt imps_interrupt;
119
120
121/*
122 *  Data structures defined here
123 */
124
125/*
126 *  MP Floating Pointer Structure (fps)
127 *
128 *  Look at page 4-3 of the MP spec for the starting definitions of
129 *  this structure.
130 */
131struct imps_fps
132{
133  unsigned sig;
134  imps_cth *cth_ptr;
135  unsigned char length;
136  unsigned char spec_rev;
137  unsigned char checksum;
138  unsigned char feature_info[5];
139};
140
141/*
142 *  MP Configuration Table Header  (cth)
143 *
144 *  Look at page 4-5 of the MP spec for the starting definitions of
145 *  this structure.
146 */
147struct imps_cth
148{
149  unsigned sig;
150  unsigned short base_length;
151  unsigned char spec_rev;
152  unsigned char checksum;
153  char oem_id[8];
154  char prod_id[12];
155  unsigned oem_table_ptr;
156  unsigned short oem_table_size;
157  unsigned short entry_count;
158  unsigned lapic_addr;
159  unsigned short extended_length;
160  unsigned char extended_checksum;
161        char reserved[1];
162};
163
164/*
165 *  Base MP Configuration Table Types.  They are sorted according to
166 *  type (i.e. all of type 0 come first, etc.).  Look on page 4-6 for
167 *  the start of the descriptions.
168 */
169
170struct imps_processor
171{
172  unsigned char type;                     /* must be 0 */
173  unsigned char apic_id;
174  unsigned char apic_ver;
175  unsigned char flags;
176  unsigned signature;
177  unsigned features;
178  char reserved[8];
179};
180
181struct imps_bus
182{
183  unsigned char type;                     /* must be 1 */
184  unsigned char id;
185  char bus_type[6];
186};
187
188struct imps_ioapic
189{
190  unsigned char type;                     /* must be 2 */
191  unsigned char id;
192  unsigned char ver;
193  unsigned char flags;
194  unsigned addr;
195};
196
197struct imps_interrupt
198{
199  unsigned char type;                     /* must be 3 or 4 */
200  unsigned char int_type;
201  unsigned short flags;
202  unsigned char source_bus_id;
203  unsigned char source_bus_irq;
204  unsigned char dest_apic_id;
205  unsigned char dest_apic_intin;
206};
207
208/*
209 *  Exported globals here.
210 */
211
212/*
213 *  These map from virtual cpu numbers to APIC id's and back.
214 */
215extern unsigned char imps_cpu_apic_map[IMPS_MAX_CPUS];
216extern unsigned char imps_apic_cpu_map[IMPS_MAX_CPUS];
217
218/* base address of application processor reset code at 0x70000 */
219extern char _binary_appstart_bin_start[];
220extern char _binary_appstart_bin_size[];
221
222/*
223 *  Defines that use variables
224 */
225#define IMPS_LAPIC_READ(x)  (*((volatile unsigned *) (imps_lapic_addr+(x))))
226#define IMPS_LAPIC_WRITE(x, y)   \
227   (*((volatile unsigned *) (imps_lapic_addr+(x))) = (y))
228
229#endif  /* !_SMP_IMPS_H */
230
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