1 | /* irq_init.c |
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2 | * |
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3 | * This file contains the implementation of rtems initialization |
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4 | * related to interrupt handling. |
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5 | * |
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6 | * CopyRight (C) 1998 valette@crf.canon.fr |
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7 | * |
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8 | * The license and distribution terms for this file may be |
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9 | * found in the file LICENSE in this distribution or at |
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10 | * http://www.rtems.com/license/LICENSE. |
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11 | * |
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12 | * $Id$ |
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13 | */ |
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14 | |
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15 | #include <libcpu/cpu.h> |
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16 | #include <bsp/irq.h> |
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17 | #include <bsp.h> |
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18 | #include <rtems/bspIo.h> |
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19 | |
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20 | /* |
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21 | * rtems prologue generated in irq_asm.S |
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22 | */ |
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23 | extern void rtems_irq_prologue_0(void); |
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24 | extern void rtems_irq_prologue_1(void); |
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25 | extern void rtems_irq_prologue_2(void); |
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26 | extern void rtems_irq_prologue_3(void); |
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27 | extern void rtems_irq_prologue_4(void); |
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28 | extern void rtems_irq_prologue_5(void); |
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29 | extern void rtems_irq_prologue_6(void); |
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30 | extern void rtems_irq_prologue_7(void); |
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31 | extern void rtems_irq_prologue_8(void); |
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32 | extern void rtems_irq_prologue_9(void); |
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33 | extern void rtems_irq_prologue_10(void); |
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34 | extern void rtems_irq_prologue_11(void); |
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35 | extern void rtems_irq_prologue_12(void); |
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36 | extern void rtems_irq_prologue_13(void); |
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37 | extern void rtems_irq_prologue_14(void); |
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38 | extern void rtems_irq_prologue_15(void); |
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39 | /* |
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40 | * default idt vector |
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41 | */ |
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42 | extern void default_raw_idt_handler(void); |
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43 | |
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44 | static rtems_raw_irq_connect_data idtHdl[IDT_SIZE]; |
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45 | |
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46 | /* |
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47 | * Table used to store rtems managed interrupt handlers. |
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48 | * Borrow the table to store raw handler entries at the beginning. |
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49 | * The table will be reinitialized before the call to BSP_rtems_irq_mngt_set(). |
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50 | */ |
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51 | static rtems_irq_connect_data rtemsIrq[BSP_IRQ_LINES_NUMBER] = { |
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52 | {0,(rtems_irq_hdl)rtems_irq_prologue_0}, |
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53 | {0,(rtems_irq_hdl)rtems_irq_prologue_1}, |
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54 | {0,(rtems_irq_hdl)rtems_irq_prologue_2}, |
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55 | {0,(rtems_irq_hdl)rtems_irq_prologue_3}, |
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56 | {0,(rtems_irq_hdl)rtems_irq_prologue_4}, |
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57 | {0,(rtems_irq_hdl)rtems_irq_prologue_5}, |
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58 | {0,(rtems_irq_hdl)rtems_irq_prologue_6}, |
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59 | {0,(rtems_irq_hdl)rtems_irq_prologue_7}, |
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60 | {0,(rtems_irq_hdl)rtems_irq_prologue_8}, |
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61 | {0,(rtems_irq_hdl)rtems_irq_prologue_9}, |
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62 | {0,(rtems_irq_hdl)rtems_irq_prologue_10}, |
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63 | {0,(rtems_irq_hdl)rtems_irq_prologue_11}, |
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64 | {0,(rtems_irq_hdl)rtems_irq_prologue_12}, |
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65 | {0,(rtems_irq_hdl)rtems_irq_prologue_13}, |
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66 | {0,(rtems_irq_hdl)rtems_irq_prologue_14}, |
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67 | {0,(rtems_irq_hdl)rtems_irq_prologue_15} |
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68 | }; |
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69 | |
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70 | static rtems_raw_irq_connect_data defaultRawIrq = { |
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71 | /* vectorIdex, hdl , on , off , isOn */ |
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72 | 0, default_raw_idt_handler ,NULL , NULL, NULL |
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73 | }; |
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74 | |
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75 | static rtems_irq_connect_data defaultIrq = { |
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76 | /* vectorIdex, hdl , handle, on, off, isOn */ |
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77 | 0, NULL , 0 , NULL, NULL, NULL |
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78 | }; |
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79 | |
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80 | static rtems_irq_prio irqPrioTable[BSP_IRQ_LINES_NUMBER]={ |
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81 | /* |
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82 | * actual rpiorities for interrupt : |
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83 | * 0 means that only current interrupt is masked |
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84 | * 255 means all other interrupts are masked |
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85 | * The second entry has a priority of 255 because |
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86 | * it is the slave pic entry and is should always remain |
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87 | * unmasked. |
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88 | */ |
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89 | 0,0, |
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90 | 255, |
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91 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 |
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92 | }; |
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93 | |
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94 | static interrupt_gate_descriptor idtEntry; |
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95 | |
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96 | static rtems_irq_global_settings initial_config; |
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97 | static rtems_raw_irq_global_settings raw_initial_config; |
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98 | |
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99 | void raw_idt_notify(void) |
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100 | { |
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101 | printk("raw_idt_notify has been called \n"); |
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102 | } |
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103 | |
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104 | void rtems_irq_mngt_init(void) |
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105 | { |
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106 | int i; |
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107 | interrupt_gate_descriptor* idt_entry_tbl; |
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108 | unsigned int limit; |
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109 | rtems_interrupt_level level; |
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110 | |
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111 | i386_get_info_from_IDTR(&idt_entry_tbl, &limit); |
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112 | |
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113 | /* Convert into number of entries */ |
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114 | limit = (limit + 1)/sizeof(interrupt_gate_descriptor); |
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115 | |
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116 | if(limit != IDT_SIZE) { |
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117 | printk("IDT table size mismatch !!! System locked\n"); |
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118 | while(1); |
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119 | } |
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120 | |
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121 | rtems_interrupt_disable(level); |
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122 | |
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123 | /* |
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124 | * Init the complete IDT vector table with defaultRawIrq value |
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125 | */ |
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126 | for (i = 0; i < IDT_SIZE ; i++) { |
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127 | idtHdl[i] = defaultRawIrq; |
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128 | idtHdl[i].idtIndex = i; |
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129 | } |
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130 | |
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131 | raw_initial_config.idtSize = IDT_SIZE; |
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132 | raw_initial_config.defaultRawEntry = defaultRawIrq; |
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133 | raw_initial_config.rawIrqHdlTbl = idtHdl; |
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134 | |
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135 | if (!i386_init_idt (&raw_initial_config)) { |
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136 | /* |
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137 | * put something here that will show the failure... |
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138 | */ |
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139 | printk("Unable to initialize IDT!!! System locked\n"); |
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140 | while (1); |
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141 | } |
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142 | /* |
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143 | * Patch the entry that will be used by RTEMS for interrupt management |
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144 | * with RTEMS prologue. |
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145 | */ |
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146 | for (i = 0; i < BSP_IRQ_LINES_NUMBER; i++) { |
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147 | create_interrupt_gate_descriptor(&idtEntry,(rtems_raw_irq_hdl) rtemsIrq[i].hdl); |
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148 | idt_entry_tbl[i + BSP_ASM_IRQ_VECTOR_BASE] = idtEntry; |
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149 | } |
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150 | /* |
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151 | * At this point we have completed the initialization of IDT |
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152 | * with raw handlers. We must now initialize the higher level |
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153 | * interrupt management. |
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154 | */ |
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155 | /* |
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156 | * re-init the rtemsIrq table |
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157 | */ |
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158 | for (i = 0; i < BSP_IRQ_LINES_NUMBER; i++) { |
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159 | rtemsIrq[i] = defaultIrq; |
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160 | rtemsIrq[i].name = i; |
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161 | } |
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162 | /* |
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163 | * Init initial Interrupt management config |
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164 | */ |
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165 | initial_config.irqNb = BSP_IRQ_LINES_NUMBER; |
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166 | initial_config.defaultEntry = defaultIrq; |
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167 | initial_config.irqHdlTbl = rtemsIrq; |
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168 | initial_config.irqBase = BSP_ASM_IRQ_VECTOR_BASE; |
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169 | initial_config.irqPrioTbl = irqPrioTable; |
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170 | |
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171 | if (!BSP_rtems_irq_mngt_set(&initial_config)) { |
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172 | /* |
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173 | * put something here that will show the failure... |
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174 | */ |
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175 | printk("Unable to initialize RTEMS interrupt Management!!! System locked\n"); |
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176 | while (1); |
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177 | } |
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178 | |
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179 | /* |
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180 | * #define DEBUG |
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181 | */ |
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182 | #ifdef DEBUG |
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183 | { |
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184 | /* |
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185 | * following adresses should be the same |
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186 | */ |
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187 | unsigned tmp; |
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188 | |
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189 | printk("idt_entry_tbl = %x Interrupt_descriptor_table addr = %x\n", |
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190 | idt_entry_tbl, &Interrupt_descriptor_table); |
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191 | tmp = (unsigned) get_hdl_from_vector (BSP_ASM_IRQ_VECTOR_BASE + BSP_PERIODIC_TIMER); |
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192 | printk("clock isr address from idt = %x should be %x\n", |
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193 | tmp, (unsigned) rtems_irq_prologue_0); |
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194 | } |
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195 | printk("i8259s_cache = %x\n", * (unsigned short*) &i8259s_cache); |
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196 | BSP_wait_polled_input(); |
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197 | #endif |
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198 | } |
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